JPS6376358A - Integrated circuit - Google Patents
Integrated circuitInfo
- Publication number
- JPS6376358A JPS6376358A JP61221279A JP22127986A JPS6376358A JP S6376358 A JPS6376358 A JP S6376358A JP 61221279 A JP61221279 A JP 61221279A JP 22127986 A JP22127986 A JP 22127986A JP S6376358 A JPS6376358 A JP S6376358A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit
- printed board
- signal
- diagnostic mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
本発明は内部回路からの出力信号をゲート回路を介して
信号出力端子に接続し、制御信号によってゲート回路を
開放状態にする集積回路であって、集積回路を搭載した
ままでプリント板を診断することを可能にする。[Detailed Description of the Invention] [Summary] The present invention relates to an integrated circuit in which an output signal from an internal circuit is connected to a signal output terminal via a gate circuit, and the gate circuit is opened in response to a control signal. This makes it possible to diagnose printed circuit boards with the PC board installed.
本発明は、制御信号によって回路部を電気的に分離でき
る集積回路に関するものである。The present invention relates to an integrated circuit in which circuit sections can be electrically isolated by control signals.
電子機器の信仰性を保障するためには、部品から製品に
至る各工程における診断を欠かすことができない。In order to guarantee the reliability of electronic equipment, it is essential to diagnose each process from parts to products.
最近、プリント板には多数の高集積度の集積回路（ＩＣ
１あるいはＬＳＩ）が搭載されて高機能の構成単位とな
っており、このため、これらプリント板を如何に効率よ
く診断するか、が重要な問題になってきた。Recently, printed circuit boards contain a large number of highly integrated circuits (ICs).
1 or LSI) and have become highly functional structural units, and for this reason, how to efficiently diagnose these printed boards has become an important issue.
一般にプリント板の診断は、集積回路を搭載したままで
診断することが望ましい。Generally, it is desirable to diagnose printed circuit boards with integrated circuits mounted on them.
そのためには、集積回路部分の擬似論理データを作成し
て、これを含むプリント板の論理データに基づいて診断
を行う必要がある。For this purpose, it is necessary to create pseudo logic data for the integrated circuit portion and perform diagnosis based on the logic data of the printed board including this data.
しかしながら、集積回路の擬似論理データの作成は、集
積回路の集積度が上がるにつれて困難となり、その作成
作業に膨大な時間を要し、１６〜３２ビツトマイクロコ
ンピユ一タ程度の集積度になると事実上不可能である。However, the creation of pseudo-logic data for integrated circuits becomes more difficult as the degree of integration of integrated circuits increases, and it takes an enormous amount of time to create the data. It's impossible.
従って、この集積回路を搭載したままでプリント板を診
断できず、集積回路とプリント板とは別々に分離して診
断していた。Therefore, the printed board cannot be diagnosed with the integrated circuit mounted thereon, and the integrated circuit and the printed board have been diagnosed separately.
上記したように集積回路の擬似論理データがない場合、
プリント板の診断に際して、搭載されている集積回路を
物理的に取り外す必要がある。As mentioned above, if there is no pseudo logic data of the integrated circuit,
When diagnosing a printed board, it is necessary to physically remove the integrated circuit mounted on it.
このために、プリント板には集積回路用のソケットを取
りつけ、そのソケット端子にプリント板の配線パターン
を接続し、ソケットで集積回路を着脱できるようにして
いた。For this purpose, a socket for the integrated circuit was attached to the printed board, and the wiring pattern of the printed board was connected to the socket terminal, so that the integrated circuit could be attached or removed using the socket.
この従来の方式では、プリント板の診断に際して、集積
回路を着脱する作業に伴う集積回路のピン折れ等の不良
発生の可能性があり、更に、ソケット付加によるコスト
上昇ばかりでなく、ソケットの占有面積増加によるプリ
ント板実装効率の低下を伴うことになる。With this conventional method, when diagnosing printed circuit boards, there is a possibility of defects such as broken pins of the integrated circuit due to the work of attaching and detaching the integrated circuit.Furthermore, not only does the cost increase due to the addition of a socket, but also the space occupied by the socket. This increase will be accompanied by a decrease in printed board mounting efficiency.
本発明はこのような点に鑑みて創作されたものであって
、搭載したままでプリント板の診断を行うことができる
集積回路を提供することを目的としている。The present invention was created in view of these points, and an object of the present invention is to provide an integrated circuit that can diagnose a printed board while it is mounted.
上記目的を達成するために、集積回路に制御信号端子と
、回路部とその信号出力端子間にゲート回路を設け、外
部からの制御信号が入力することによって、ゲート回路
を開放して信号出力端子を回路部から電気的に分離でき
るようにする。In order to achieve the above purpose, a control signal terminal is provided in the integrated circuit, and a gate circuit is provided between the circuit section and its signal output terminal, and when an external control signal is input, the gate circuit is opened and the signal output terminal electrically isolated from the circuit section.
プリント板診断に際して集積回路に制御信号、即ち診断
モード信号を入力することによって、信号出力端子につ
ながるゲート回路が開放状態になる。When diagnosing a printed circuit board, by inputting a control signal, ie, a diagnostic mode signal, to the integrated circuit, a gate circuit connected to a signal output terminal is placed in an open state.
即ち、実質的には集積回路を取り外したのと同じ状態に
なる。That is, the state is essentially the same as if the integrated circuit was removed.
従ってその状態で、診断装置はその試験端子を集積回路
の端子に接触させることによって、その集積回路の信号
入力端子の入力信号を観測し、また、信号出力端子に所
望の出力信号を送出して、その集積回路の信号出力端子
以降の診断を行う等、集積回路を搭載したままの状態で
プリント板の診断が可能となる。Therefore, in this state, the diagnostic device observes the input signal at the signal input terminal of the integrated circuit by bringing its test terminal into contact with the terminal of the integrated circuit, and also sends a desired output signal to the signal output terminal. It becomes possible to diagnose a printed board with the integrated circuit still mounted, such as by diagnosing the signal output terminal and subsequent parts of the integrated circuit.
以下、本発明の集積回路の実施例を図を用いて説明する
。Embodiments of the integrated circuit of the present invention will be described below with reference to the drawings.
第１図は本発明の一実施例の回路構成図を示す。FIG. 1 shows a circuit diagram of an embodiment of the present invention.
なお、図の集積回路２０では、本発明の主旨に必要とす
る部分のみを示す。Note that in the integrated circuit 20 shown in the figure, only the portions necessary for the gist of the present invention are shown.
集積回路２０には診断モード信号の信号入力端子１があ
り、回路部１０の各出力信号は、信号毎にトライステー
ト素子３からなるゲート回路を介して信号出力端子２に
接続されている。The integrated circuit 20 has a signal input terminal 1 for a diagnostic mode signal, and each output signal of the circuit section 10 is connected to a signal output terminal 2 via a gate circuit consisting of a tristate element 3 for each signal.
トライステート素子３は、そのゲートＧに信号が入力す
る時は、その出力は高インピーダンス状態、即ち、開放
状態となり、ゲートＧに信号が入力しない時は、トライ
ステート素子３の入力信号ｒｌＪ、ｒＯＪに対してその
出力信号は「１」。When a signal is input to the gate G of the tri-state element 3, its output is in a high impedance state, that is, an open state, and when no signal is input to the gate G, the input signals rlJ, rOJ of the tri-state element 3 are The output signal is "1".
「０」となり、トライステート素子３の入力と出力間の
信号の授受が行われる。It becomes "0", and signals are exchanged between the input and output of the tristate element 3.
このような回路構成をもつ集積回路２０に診断モード信
号が入力すると、その信号出力端子２は開放状態になり
、プリント板に搭載された集積回路２０は、取り外され
たと同じ状態となる。When a diagnostic mode signal is input to the integrated circuit 20 having such a circuit configuration, the signal output terminal 2 becomes open, and the integrated circuit 20 mounted on the printed board is in the same state as if it had been removed.
従って、集積回路２０を取り外すことなく、装着状態の
ままでプリント板の診断を行うことができる。Therefore, the printed board can be diagnosed without removing the integrated circuit 20 while it is still attached.
以上述べてきたように、本発明による集積回路は、診断
モード信号の入力によってゲート回路を開放状態にして
、プリント板と集積回路を電気的に分離することができ
る。As described above, the integrated circuit according to the present invention can electrically isolate the printed board and the integrated circuit by opening the gate circuit by inputting the diagnostic mode signal.
その結果、集積回路を装着したままでプリント板の診断
ができ、ソケット不要によるコスト削減、作業工数の削
減、プリント板実装効率の向上環が可能となり、本発明
は実用的には極めて有用である。As a result, it is possible to diagnose printed circuit boards with integrated circuits attached, reducing costs by eliminating the need for sockets, reducing man-hours, and improving printed board mounting efficiency, making the present invention extremely useful in practice. .
第１図は本発明の集積回路の一実施例を示す回路構成図
である。
図において、
１は診断モード信号入力端子、
２は信号出力端子、
３はトライステート素子、
１０は回路部、
／＃ＦＩＥ’Ｆｆ ｑ−＊＄ｆフｎｏｉｉｉｘ−ｉ第１
図FIG. 1 is a circuit diagram showing an embodiment of the integrated circuit of the present invention. In the figure, 1 is a diagnostic mode signal input terminal, 2 is a signal output terminal, 3 is a tri-state element, 10 is a circuit section, /#FIE'Ffq-*$fnoiiix-i 1st
figure
Claims (1)
３）を付設し、該ゲート回路（３）に対する外部からの
制御信号によって前記信号出力端子（２）を回路部（１
０）から電気的に分離できるようにしたことを特徴とす
る集積回路。A gate circuit (
3) is attached, and the signal output terminal (2) is connected to the circuit section (1) by an external control signal to the gate circuit (3).
An integrated circuit characterized in that it can be electrically isolated from 0).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61221279A JPS6376358A (en) | 1986-09-18 | 1986-09-18 | Integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61221279A JPS6376358A (en) | 1986-09-18 | 1986-09-18 | Integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6376358A true JPS6376358A (en) | 1988-04-06 |
Family
ID=16764290
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61221279A Pending JPS6376358A (en) | 1986-09-18 | 1986-09-18 | Integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6376358A (en) |
-
1986
- 1986-09-18 JP JP61221279A patent/JPS6376358A/en active Pending
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