JPS6382005A - Amplifier circuit - Google Patents

Abstract

PURPOSE:To reduce the offset voltage of an amplifier by supplying the base current of a transistor(TR) which performs amplifying operation to a current mirror circuit which inputs a current corresponding to a current flowing in the TR. CONSTITUTION:The current mirror circuit 13 consists of two NPN TRs Q11 and Q12 and one PNP TR Q13. The base current Ib of the TR Q13 flows to the TR Q12 and the output current of the TR Q11, i.e. suction current it set to Ib. The base current Ib1 of a TR Q1 is sucked by the current mirror 13 and does not flow to an input resistance R0. Therefore, neither the Ib1 nor the R0 has a voltage drop and the bias voltages of the TRs Q1 and Q2 are stabilized with a reference voltage Vref. Thus, the variation in the bias voltages of the TRs due to the voltage drop across the input resistance is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a compensation circuit suitable for use in compensating the offset voltage of an amplifier circuit, and particularly relates to a compensation circuit suitable for use in compensating for the offset voltage of an amplifier circuit. ) [Prior art] When forming an amplifier, the generation of offset voltage and its compensation are important issues.

The offset voltage is the voltage that appears at the output terminal when the input signal of the amplifier is zero, and is preferably zero. However, it is generally difficult to set it to zero, and the fact that this changes with temperature and time is called zero point fluctuation or zero drift.

Various proposals have been made regarding compensation for the offset voltage, one example of which is shown in US Pat. No. 4,520,282.

The general idea is that a pair of transistors are connected in a differential pair to form an amplifier, and a current for correcting the pace current is supplied to the bases of the pair of transistors to balance the two.

The present inventors have studied compensation for the offset voltage of an amplifier. Although the following is not a publicly known technique, it is a technique developed by the present inventors, and its outline is as follows.

[Problem that the invention seeks to solve]

That is, instead of using the circuit configuration described above, we considered that the offset voltage could be compensated by controlling the bias voltage of the transistors forming the amplifier.

In particular, when a pair of transistors is connected to a differential pair and an input resistor is used on the input side, when current flows through this input resistor, the bias voltage of the pair of transistors changes due to the voltage drop, causing an offset voltage. It became clear.

In the above case, if the input resistance is large, the offset voltage will be large even if the current is constant, and even if the input resistance is constant, the current will fluctuate depending on the characteristics of the transistor, temperature changes, etc. For example, the offset voltage also fluctuates.

When integrated into an IC, the resistance value of the input resistor is fixed. However, the inventors realized that the offset voltage can be reduced by controlling the current flowing through the input resistor, and came to propose the present invention.

An object of the present invention is to provide a compensation circuit that can reduce the offset voltage of an amplifier and has a circuit configuration suitable for IC implementation.

The above and other objects and novel features of the present invention will become apparent from the present specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

That is, a drive current is supplied from a current supply circuit to a pair of active elements, such as an operational amplifier made up of transistors, or an amplifier made up of a transistor whose emitter is grounded. A current mirror circuit is provided which uses a current corresponding to this drive current as a reference current and sucks a base current as an output current from a control terminal of a transistor forming the amplifier, for example, a pace.

[Effect]

According to the above-described means, when the drive M current increases due to changes in transistor characteristics, the reference current of the current mirror circuit also increases correspondingly. The output current of the current mirror circuit is set to K so that the increase in the base current of the transistor is absorbed in response to the increase in the reference current, in other words, the increase in the drive current. As a result, the base current flowing through the input resistance of the transistor is kept constant, the bias voltage of the transistor is stabilized, and the object of the present invention, which is to reduce the offset voltage, can be achieved.

[Embodiment 1] Hereinafter, an embodiment of a compensation circuit to which the present invention is applied will be described with reference to FIGS. 1 and 2. Note that FIG. 1 is a circuit diagram for explaining the basic concept of the present invention, and FIG. 2 is a circuit diagram showing a specific example.

The feature of this embodiment is that it is configured to reduce the offset voltage of the operational amplifier.

First, the basic concept of the present invention will be explained with reference to FIG.

1 is an operational amplifier, and a constant current circuit 2 is for reducing offset voltage. Ro is the input resistance, Rs-
Rt determines the degree of amplification.

Assume now that a base current flows from the operational amplifier 1. The constant current circuit 2 operates to absorb the pace current amount. As a result, the base current amount does not flow through the input resistor R0, and the bias voltage of the operational amplifier l is stabilized. Then, the offset voltage Δ■ appearing on the output side of the operational amplifier l is reduced.

Next, specific circuit operation will be explained with reference to FIG.

The input amplifier 11 amplifies the input signal Vin supplied via the input capacitor C1, and is composed of a pair of transistors Q+ + Qts connected in a differential pair, and further transistors Q and +Q4 that operate as a load circuit. ing.

Reference numeral 12 corresponds to a current supply circuit according to the present invention, and transistors Q, to Q perform a current mirror operation. The reference current amount flowing through the transistor Qs (diode-connected) is regulated to a desired current amount by the constant current circuit C81.

A drive current is supplied to the input amplifier 11 via the transistor Qy. The miller area of transistor Q is
This is doubled for the above transistor Qs=Q. Therefore, the amount of drive current is 21. Therefore, a 1/2 current amount of 0 flows through the transistor Q--Qt.

Since the emitter ratios of transistors Q=-Qa are the same, the output current of transistor Q is controlled in the same way as the reference current. The output current becomes a reference current of the current mirror circuit 13 in the present invention.

The current mirror circuit 13 consists of two NPN) transistors Qst m Qt* and one PNP) transistor Q.
+m. Transistor Qs
The base current Ib of s is Io/hfeQta.

The base current Ib is the transistor QI! The output current of the transistor Qsl, in other words, the sink current, is set to Ib.

What should be noted here is the transistor Q+5QtsQs
= Qs - Qd , Ql are formed in the same device process, and when there is a temperature change, etc., the transistor Q
, and the sink current of transistor Qll change almost identically.

The base current Ib of the transistor Q is sucked into the current mirror circuit 13 and does not flow to the input resistor R0. Therefore, a voltage drop of Ib, .Ro does not occur, and the bias voltage of transistors Q+-Qt is stabilized by the reference voltage Vref.

and transistors QI-Q--Qs, Q.

Since Qte and QH are each PNP transistors, hfe, temperature characteristics, etc. can be made almost the same. Therefore, even if the base current Ib fluctuates while performing a predetermined amplification operation, the amount of sinking by the transistor QIt will vary accordingly, and the compensation operation for the offset voltage ΔV will be performed. .

The compensation circuit configured as described above has the following effects.

(11) By sucking the base current of the transistor that performs the amplification action by a current mirror circuit, the base current does not flow to the input resistor, and the fluctuation in the bias voltage of the transistor is reduced due to the voltage drop of the input resistor. So reducing the offset voltage of the amplifier,
This effect can be obtained.

(2) The above +11 allows the gain of the amplifier to be made high.

(3) According to (1) above, fluctuations in the reference level of the signal to be amplified are reduced, and the dynamic range can be increased even when the power supply voltage is low.

(4) According to (1) above, there is no need to provide a capacitor for cutting direct current in the signal transmission system including the amplifier, and the signal transmission system can be easily integrated into an IC.

(5) Due to (2) above, the number of external parts is reduced and the IC
Since the implementation becomes easier, the cost of electronic equipment can be significantly reduced.

[Embodiment 2] Next, a wc2 embodiment of the present invention will be described with reference to FIG.

The main difference between this embodiment and the first embodiment is the transistor Q that constitutes the amplifier 11.

The reason is that Ql, etc. are replaced with N1'N) transistors.

The compensation circuit shown in this embodiment has the same effects as the first embodiment.

The current amount 0 is determined by the resistor Rst of the current supply circuit 12 and the transistor Q6. The emitter area of transistor Q is that of another transistor QI.

Since the current is doubled for Q6, the drive current of the amplifier 11 is 2 times as above. become.

And the current flowing through transistor QI -Qt is . So, from the base current of transistor Q, I is . /
Determined by hfeQI.

The output current of the transistor Qs is also Io, and the base current Ib of the transistor QIm is determined by Io/hfeQts. The output current of the transistor Q It, in other words, the sink current of the base current Ib is also Ib
becomes. Since the transistors Q1 to Qt a are formed in the same device process, Ib
When , changes, the sink current of transistor Qtt changes correspondingly.

Therefore, the voltage drop due to input resistance R0 is reduced,
Variations in the bias voltages of transistors Q, , Q, will also be reduced to compensate for the offset voltage Δ■.

The compensation circuit shown in this embodiment has the same offset voltage compensation effect as the first embodiment.

Above, the invention made by the present inventors has been specifically explained based on examples, but the present invention is not limited to the above examples, and can be modified in various ways without departing from the gist. Needless to say, it is. For example, although the input amplifier 11 is made up of transistors connected in a differential pair, it may be made up of a single transistor whose emitters are summed with a common emitter. In this case, a current mirror circuit is provided to absorb a pace current corresponding to the current flowing through the transistor, thereby stabilizing the bias voltage of the transistor.

Furthermore, the above current mirror circuit 13. Power supply circuit 12
is not limited to a bipolar transistor, but may be a P-channel or N-channel MOS transistor.

In the above explanation, the invention made by the present inventors and others was mainly applied to compensation of offset voltage of an input amplifier, which is the background field of application, but the invention is not limited to this, for example, DC It can be used for various types of directly connected amplifiers.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.

In other words, the pace current of the transistor that performs the amplification action is 1! corresponding to the current flowing through this transistor! Since the pace current is configured to be sucked by a current mirror circuit that sucks the current, the pace current does not flow to the input resistance of the transistor and fluctuate the bias voltage.
The offset voltage of the amplifier is reduced.

[Brief explanation of the drawing]

Figures 1 and 2 show a first embodiment of a compensation circuit to which the present invention is applied. Figure 1 is a circuit diagram of the compensation circuit showing the basic concept, and Figure 2 shows a specific example. Circuit diagram of compensation circuit, Figure 3g3 shows a circuit diagram of a compensation circuit showing a second embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Amplifier, 11... Input amplifier, 12... Power supply circuit, 13... Current mirror circuit, 14...
・Output circuit, Q1 to Q□...Transistor, I, I. . L, L, L...Current, ΔV...Offset voltage. Agent: Patent Attorney Katsuo Ogawa, Figure 3

Claims (1)

[Claims] 1. An active element that performs an amplification action, a current supply circuit that supplies a drive current to the active element, a reference current that is controlled in accordance with the drive current, and an output current that corresponds to the reference current that drives the active element. An amplifier circuit comprising: a current mirror circuit for compensating the bias voltage of a control terminal;