JPS6399573A - Memory device - Google Patents

Abstract

PURPOSE:To obtain a constitution in which the effect of hot carriers is less and soft writing is suppressed in a floating gate type memory device, by decreasing the impurity concentration of an impurity region, which is formed beneath a gate insulating film wherein at least writing is performed, in comparison with the impurity concentration in another impurity region. CONSTITUTION:A tunnel oxide film 7 is formed not on a high concentration region 17 of a drain region 14 but on a low concentration region 5. The low concentration region 5 serves the role of an offset part 18 of the drain region in this structure, Namely, only the side of the drain region 14 has an LDD structure. (When the xj (diffusion depth) of the N<-> region 5 is deeper than the N<+> region 17, the DDD (Double Diffused Drain) structure is obtained.) Therefore the electric field intensity in the tunnel gate oxide film 7, wherein writing is carried out, is alleviated. As a result, a memory device 16, in which the effect of hot carriers is less and soft writing is suppressed, is obtained. When the tunnel gate oxide film 7 is formed on the N<-> region 5 as a thermal oxide film, the quality of the film becomes excellent and reliability is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a memory device, and in particular to a 70-ring gate type EEFROM memory device.

[Summary of the invention]

The present invention is a floating gate type mesori device in which soft writing due to hot carriers can be suppressed by relatively lowering the impurity concentration of an impurity region formed under a gate insulating film where writing is performed. It has been made possible.

[Conventional technology]

As shown in Figure 3, the conventional floating gate type E
FiPROM (Electrically Eraser)
ble and programmable ROM)
The memory device (2I) includes an oxide film +23. (7
), a floating gate circle and a control gate α are formed. (7) is a tunnel gate oxide film. Note that this structure is based on Flotox (Flo
It is also called the ating-gate tunnel oxide) type.

[Problem that the invention seeks to solve]

Floating gate type B B P according to the above structure
In the case of the I'LOM memory device (21), since the tunnel gate oxide film (7) is formed on the diffusion region having the same high impurity concentration as the source region 9 and drain region side, the oxide film ( This had the disadvantage of poor film quality and lack of reliability.Also, when the channel length is shortened, the impurity region αn all has the same high concentration, which causes electric field concentration and creates pot carriers. There was also the problem that lighting was more likely to occur.

The present invention provides a memory device that can solve the above problems.

[Means for solving problems]

The present invention provides a floating gate type memory device y! t,
(In IQ, at least the impurity concentration of the impurity region (5) formed under the gate insulating film (7) where writing is performed is lowered by ℃ compared to the impurity concentration of other impurity regions (17). It is characterized by

[Effect]

According to the present invention, the tunnel gate region (7) is formed not on the relatively high concentration region of the source region (131 and drain region I) but on the low concentration region (51), and The region (5) has a structure that also serves as an offset portion of the drain region I, and the electric field strength is relaxed, so that a structure that is less affected by hot carriers and strong against soft writing can be realized.

〔Example〕

An embodiment of a floating gate type memory device according to the present invention will be described together with a manufacturing method example.

First, as shown in FIG. 1A, a gate oxide film (2) is formed on a P-type Si substrate txt, a field oxide film (3) is formed by the LOCO8 method, and then an N-type impurity film is formed using a photoresist (4) as a mask. For example As or Phos
is ion-implanted at a low concentration (IXIO=10/l) to form an N- region (5).

Next, as shown in FIG. 1B, using this photoresist (4) as a mask, the tunnel gate oxide film (2) in the area where the force is to be formed is selectively etched away to form the opening (2). 6).Contrary to this example, after selectively forming the opening (6), ion implantation is performed to
A region (51) may be formed.

Next, as shown in FIG. 1C, after removing the photoresist (4), thermal oxidation is performed to form a tunnel gate oxide film (7) on the N region (5).

Next, as shown in the first diagram, a polycrystalline St layer (it may be a silicide layer or a composite layer of both) (8) to form a floaty/guge) (lυ) on the entire surface, a thermal oxide film ( 9) and a polycrystalline Si layer (a silicide layer or a composite layer of both) H for forming the control gate α3.
are formed sequentially.

Next, as shown in FIG. 1E, by photolithography,
Etching is performed using the photoresist (4) as a mask to form a floating gate aυ and a control gate a3.

Note that these 70-taing gates αυ and the control gates 00 in the width direction are not necessarily formed at the same time by cell fan in software.

Next, as shown in FIG. 1F, N-type impurities such as As or rhos are ion-implanted at a high concentration to form a source region Q31 and a drain region a1, which are N regions αη.

Finally, as shown in FIG.
OM) Get a Mori device cry.

According to the memory device of this embodiment, the tunnel gate oxide film (7) is formed not on the drain region (high concentration region Q7 of 141) but on the low concentration region (51), and this low concentration region (51) is formed on the low concentration region (51). ) or the drain region (14). In other words, the drain region 04
Only the side has LDD structure (N area t5)
(D
ain) structure), the electric field strength in the tunnel gate oxide film (force) on which writing is performed is relaxed.

As a result, a memory device ue that is less affected by hot carriers and is resistant to soft writing can be obtained. Further, when the tunnel gate oxide film (7) is formed as a thermal oxide film on the N region (5) as in this embodiment, the film quality becomes good and reliability is improved.

Tunnel gate oxide film (7) where writing is performed next
Another manufacturing method for relatively lowering the concentration of the impurity region (5) below will be described.

As shown in FIG. 2A, after forming a gate oxide film (2) on a P-type Si substrate (1), a photoresist (4) having a length corresponding to the gate length is formed on the gate oxide film (2). Form. Using this photoresist (4) as a mask, an N-type impurity such as As is added at a low concentration (IXIO~10
N regions (5) are formed in the Si substrate (1) in portions that are to become the source region a3 and the drain region (141) by ion implantation to a depth of 7 cm 2 .

Next, as shown in FIG. 2B, a process similar to that shown in FIG. 1B is performed to selectively remove the portion of the gate oxide film (2) corresponding to the drain region circle.

After that, through the same steps as those shown in FIG. 1C to FIG. 1F, the drain region (141
A floating gate type memory device αe having an LDD structure is obtained. In addition, as shown in the figure, in a normal case, part of the source region αJ becomes the N region (5), but this is because part of the original N region (5) remains due to the misalignment of the mask. It is something. Therefore, in an ideal case where mask misalignment does not occur, the source region aJ
is only the high concentration N region (17).

〔Effect of the invention〕

According to the present invention, a floating gate type memory device that can suppress soft writing caused by hot carriers can be obtained. Further, by forming the tunnel gate insulating film as a thermal oxide film in the N region, a tunnel gate insulating film with good film quality can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a process diagram showing a manufacturing method example of the embodiment, FIG. 2 is a process diagram showing another manufacturing method example, and FIG. 3 is a sectional view of a conventional example. (1) is P-type 8i substrate, (2) is gate oxide film, (5)
is an N region, (7) is a tunnel gate oxide film, Uυ is a floating gate, α2 is a control gate, 03 is a source region, 04 is a drain region, and αe is a memory device.

Claims (1)

[Claims] 1. A floating gate type memory device, wherein the impurity concentration of an impurity region formed under a gate insulating film where writing is performed is lower than impurity concentrations of other impurity regions. .