JPS6399681A - Photographing device - Google Patents

Abstract

PURPOSE:To compensate the level of a read-out signal by readingout a signal charge in a photoelectric conversion cell being added one upon another if a subject is comparatively dark, and reading-out each signal charge of the photoelectric conversion cell if an object is comparatively bright. CONSTITUTION:When a field mode recording and a frame mode recording are switching to an automatic selecting mode, if an AE control part 16 detects that the object is at the low intensity of an illumination, an output line 27 comes to 'H'. The output of a NAND gate 22 comes to 'L', and a control signal, that is the output of an AND gate 23, comes to 'L', and a synchronizing signal generator 13 is set at a field mode in a still mode. Also, if the object is not at the low intensity of the illumination, the output line 27 comes to 'L', and the output of the NAND gate 22 comes to 'H', and the control signal, that is the output of the AND gate 23, comes to 'H', and the synchronizing signal generator 13 is set at a frame mode in the still mode. Thus, the image picking-up of the most suitable sensitivity corresponding to the brightness of the object is performed.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an imaging device using a solid-state imaging device.

[Background technology]

In recent years, so-called portable video, which is a miniaturized video camera and VTR, has been actively developed, but in the future, an even more advanced form, 8 mm video, which integrates a video camera and a VTR, is likely to be popular.

The miniaturization of such electronic devices is particularly dependent on semiconductor technology. Due to such advances in semiconductor technology, the photoelectric conversion section of the aforementioned video camera is also likely to be replaced from an image pickup tube to a solid-state image pickup device. Currently, solid-state image sensors have many features compared to image pickup tubes.

In other words, because it is a solid-state device, it is small, has low power consumption,
It has features such as mass production and no burn-in.

Establishment of technology for solid-state image sensors with these many features,
With the development of ultra-small magnetic recording devices, the conventional silver halide photography technique 1, which uses silver halide film as a recording medium, is being overtaken by magnetic photography or electronic photography techniques that do not require development.

The main use of VTRs today is to record moving images on a VTR and display them on a TV, which is called a movie video.Still images are recorded on a recording device and the recorded signal is sent to a TV. If we call still video something whose main purpose is to display it or print it out using a printer, there is not much difference between both movie video and still video, as their signal formats are converted into TV signal formats. .

However, while movie video generally captures images of the subject continuously, still video captures images of the subject instantaneously, just like a regular camera, so it uses an iris, shutter, and AGC.

The responsiveness of white balance etc. needs to operate quite differently, and in addition, the driving method of the solid-state image sensor will also be slightly different, so the current single optical system and signal processing system cannot be used for both. There is a problem.

For this reason, it is preferable to separate the movie camera section and the still camera section, but it will only be worth it in terms of cost once such cameras have become sufficiently popular. Currently, it is advantageous to use both.

If the camera section is used for both movies and still images, problems arise with the method of accumulating charges in the solid-state image sensor and the method of reading them out. Solid-state image sensors include MOS type and incline type CCD (IL-CCD).

Frame transfer type COD (FT-CCD)
However, since the basic structure of the device is not so relevant here, the explanation will be given using an FT-CCD as an example.

1? A T-CCD consists of an imaging section consisting of a plurality of photoelectric conversion cells that convert the light of the subject image into charges, a part of the memory that temporarily stores signal charges from the imaging part, and a part of the memory that converts the signal charges from the memory into a TV. It consists of a horizontal shift register section that reads data in synchronization with a synchronizing signal, and an on-chip amplifier section that amplifies the signal charge from the horizontal shift register section and outputs it as a signal voltage.

When using such an FT-CCD as a movie camera, the imaging section performs photoelectric conversion as described above during the l-field period, and this photoelectrically converted signal charge is transferred to a vertical transfer pulse of several MHz during the vertical blanking period. is moved to a part of memory. Then, the signal charge in a part of the memory is transferred to the horizontal shift register section during the horizontal blanking period for one horizontal scanning fig in the next field period, and is read out as a CCD signal from the on-deep amplifier in the next stage. It is in a state of transformation. In other words, photoelectric conversion and vertical transfer are repeated for each field, resulting in continuous video transmission.

Next, if the FT-CCD just explained is used as a still camera, image blur will easily occur, because TV belief is based on one frame of video transmission, and I-frame is two-frame image ( Since one image is assembled by interlacing (odd and even fields), one image is generated by photoelectric conversion at different times.
The frame signal is used particularly at high speeds (for moving subjects, image blurring occurs and the image quality deteriorates).There are two methods to eliminate this drawback.

The first method is to use signals of only odd fields (or only even fields).

That is, this is a method in which the signal of the odd field is also used for the next even field. However, when such a method is used, the vertical resolution deteriorates, making it unsuitable for still images.

The second method is to double the number of vertical elements in the image sensor, and to provide a second horizontal shift register between the image sensor and a part of the memory, so that odd and even fields can be displayed simultaneously on the surface of the image sensor. It is possible to obtain and read out sequentially,
The idea is to use a solid-state image sensor that can handle both movie video and still video. As such a solid-state imaging device, the present applicant has filed Japanese Patent Application No. 56-14658.
I proposed this in issue 7.

This imaging device is shown in FIG. 1, and its operation will be briefly explained.

In FIG. 1, 1 is an imaging section in which a plurality of photoelectric conversion cells are arranged in a matrix, 2 is a memory part that transfers and stores signal charges obtained in the imaging section, and 3 is a memory section for transferring and accumulating signal charges obtained in the imaging section. a first horizontal shift register for reading out; 4 a second horizontal shift register for reading out signal charges stored in a part of the memory;
5.6 is the first. This is an on-chip amplifier that amplifies the read signal of the second horizontal shift register. This imaging device as a whole forms a frame transfer type CCD. The number of cells in the vertical direction of the imaging section 1 is 490, and the number of cells in the vertical direction of the memory part 2 is 245.

In the case of a movie video, the vertically adjacent 2 of the imaging unit 1
Signal charges for pixels are sequentially added in the first shift register 3, transferred to the memory part 2, and read out from the second shift register 4 via the on-chip amplifier 6 as a signal IC. (This mode is called the first mode or field mode.

) In the case of a still video, signal charges of odd-numbered cells in the vertical direction of the imaging section 1 are read out from the first horizontal shift register 3, and signal charges of even-numbered cells are read out by the second horizontal shift register 4. (This mode is called the second mode or frame mode).

With this configuration, if frame mode is used, a completely interlaced signal can be obtained without loss of vertical resolution even in the case of still video. Therefore, the device shown in FIG. 1 can be applied to both movies and stills.

In the case of still video, reading in field mode is also possible at the expense of vertical resolution.

[Problem that the invention seeks to solve]

By the way, if you compare field mode and frame mode, you will notice that compared to field mode, which adds the signal charges of two cells, frame mode, which reads out the signal charges of each cell as is, has almost no signal charge. It will be outside. In other words, the sensitivity of the camera will be reduced by one aperture stop.

Furthermore, the on-chip amplifier section is composed of MO8 elements, and considering that this MOS has poor low-frequency noise characteristics and that the human eye easily detects noise in the low-frequency range,
The S/N deterioration of one stop of aperture becomes a problem that cannot be ignored.

In addition, the current number of horizontal elements in solid-state image sensors is 390 or 570, which is insufficient, and the number of horizontal elements may be increased in the future. It is expected that the optical system will become progressively smaller to 8mm, and camera sensitivity will become a very important issue.

The present invention provides an imaging device capable of changing the sensitivity of the imaging device and compensating the level of the readout signal by changing the reading method from the solid-state imaging device according to the brightness of the object. It is intended to.

[Means for solving problems]

In order to achieve the above object, the present invention provides a solid-state image sensor in which a plurality of photoelectric conversion cells are arranged in a matrix, and a method for extracting a readout signal from the image sensor. a readout means for selectively switching between a first mode in which charges are added and read out and a second mode in which signal charges of each of the photoelectric conversion cells are read out; and a control beam in accordance with the brightness of the subject. and selects the second mode when it is relatively bright according to the control signal,
and control means for controlling the reading means to select the first mode when it is relatively dark.

[For production]

With this configuration, in the present invention, when the subject is relatively dark, the control means selects the first mode in which the signal charges in the photoelectric conversion cells are added and read out, and when the subject is relatively bright, the control means selects the first mode in which the signal charges in the photoelectric conversion cells are added and read out. Since switching is made to select the second mode in which each signal charge is read out, it is possible to capture an image with the optimal sensitivity corresponding to the brightness of the subject, and even when read out in the first mode, the readout signal remains unchanged. A high-quality image signal can be obtained without reducing the S/N ratio.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

In Fig. 2, 11 is an FT-CC having the structure shown in Fig. 1.
D, the imaging section consists of about 570 horizontal elements and about 490 vertical elements. 12 is CCDII driver, 13 is CCD
This is a synchronizing signal generating circuit that generates pulses for driving II, and 12.13 constitutes a reading means. 14 is an iris and shutter control circuit for controlling the amount of light incident on the CCI) 11, 15 is a first mode switching circuit that switches between movie mode and stay mode, and 1G is the brightness of the subject from the output signal of CCD II. 17 is an AE control unit 16 which forms a signal according to the iris aperture value and determines the shutter operation speed.
When the signal level is low even if the iris is opened, the auto gain control section (hereinafter referred to as A) variably controls the signal level.
(referred to as GC). 18 is a signal processing circuit consisting of a process circuit encoder circuit and a modulation circuit for converting the output signal of AGC] 7 into a recording signal; 19 is a recording head; 20 is a recording mechanism consisting of a motor, etc.; 21 is a synchronization signal generation A rotation control section that controls the speed and phase of the motor of the recording mechanism 20 by control pulses from the device 13, 22 is a Nantes gate, and 23 is an AND gate. It consists of 24
is a switch circuit, and 25 is a frame l in stay mode.
A second mode switching circuit 26 selects whether to select the desired mode and field manually or automatically; 26 is a third mode switching circuit that selects frame mode or field mode when manual mode is selected in circuit 25; The switching circuit 30 is a switching circuit including an amplifier circuit as a level compensation means.

When the movie mode is selected in the money plan 1 mode switching circuit 15, the output of the switching circuit I5 becomes a low level (hereinafter referred to as "L").
), and this signal causes the synchronization signal generator 13 to generate a movie mode control pulse.

That is, when a trigger switch (not shown) is pressed, power is applied to each circuit to start recording. Movie mode is continuous recording, so AB controls the iris and AGC17.
The control unit 16 performs feedback control with an appropriate time constant. Further, the CCD II reading method is set to the field mode described above, and the data is read out from the second horizontal shift register 4 in FIG. 1 via the on-chip lamp 6.

Next, when the first mode switching circuit 15 selects the stay mode, the output of the mote switching circuit 15 becomes a high level (hereinafter referred to as "TI"), and outputs a stay mode control pulse to the synchronization signal generator 13. Instruct them to do so. A.E.
The control unit 16 determines the shutter speed and iris aperture value and transmits them to the iris shutter control circuit I4. Both the field mode recording and frame mode recording mentioned above are considered as the stay mode. When the field mode recording and frame mode recording are set to the automatic selection mode, the switch circuit 24 is connected to contact (a).

In the automatic selection mode, when the AE control unit 16 detects that the subject is under low illumination, the output line 27 becomes "T(". Then, the output of Nandogame 1 and 22 becomes "L", and the output of Antogame 1 and 23 becomes "L". The output of the control unit υ becomes "17'°, and the synchronization signal generator 13 is set to field mode in stay mode. Also, when the subject is not in low illumination, the output line 27 becomes "■," The output of the gate 22 is "I(", the control signal output from the gate 1.23 is "I-I", and the synchronizing signal generator 13 is set to the frame mode in the stay mode.

When the second mode switching circuit is set to the manual selection mode, the switch circuit 24 is connected to the (b) side and follows the setting of the third mode switching circuit 26. The third mode switching circuit 26 can arbitrarily select field mode or frame mode during the stay mode.

When the field mode is selected in the stay mode, an image with a good S/N ratio can be obtained even if the subject is under low illumination. Furthermore, even when the subject is under high illumination, images with a soft focus or so-called blurring effect can be obtained.

Furthermore, when the frame mode is selected, high-resolution, sharp images can be obtained.

By the way, as mentioned above, in the field mode, the output of the second horizontal shift register shown in FIG. 1 is used,
Since the first and second horizontal shift registers are used in the frame mode, switching of the shift registers in each mode is performed by the switch circuit 30. The operation of the switch circuit (0 will be explained in detail below).

FIG. 3 shows a first embodiment of the switch circuit 30.

In the figure, 40 is an adder, 41 is an amplifier, and 42 is a switch. In frame mode, the read signals IA, I
B is made into one system via an adder 40, and then compensated by an amplifier 41 so that it becomes equal to the level of the read signal IC in the field mode. Amplifier 4 when in field mode
The signal is sent directly to the switch circuit 42 without going through the signal 1. The switch circuit 42 is connected to the (a) side in the frame mode,
Connected to the (b) side in field mode. With this configuration, the difference in read signal level between the frame and field modes is compensated for.Also, since the level is adjusted before being used in the AE control section 16, the subsequent circuit becomes complicated. This can be prevented.

4 and 5 show other circuit examples of the switch circuit 30.
', 30'.

In the example shown in FIG. 4, gain adjustment of the on-chip amplifiers 5 and 6 of the CCD or the imaging section 1. Part of memory 2. Shift register sections 3, 4, on-chip amplifier 5
, 6, the signals IA, I
This is an example in which the signals B are amplified at different ratios through separate amplifiers 43 and 44, and then added together by an adder 45 to form one series. The operation of switch 46 is the same as switch 42 in FIG. As described above, according to this embodiment, since level matching is performed between odd and even fields in the frame mode, it is possible to prevent flicker from occurring when playing back on a TV receiver.

In the example shown in FIG. 5, in the field mode, the read signal IC
In this example, the level of the signal is lowered by the attenuator 48 to perform compensation so that the level is matched with the frame mode read signal. Note that 47 is an adder and 49 is a switch. Although an example has been shown in which level compensation is performed using an amplifier or an attenuator as a compensation means, level compensation may be performed using other configurations. Further, although the above description has been made using an FT-CCD, the present invention is not limited to the type of image sensor.

The IL-CCD and MOS types will be briefly explained below.

Figure 6 shows interline transfer method (IL-CCD)
FIG. As shown in the figure, the IL-CCD includes a light receiving element 51 which is a photoelectric conversion section, a transfer gate TG which controls the transfer of information charges accumulated in the light receiving element 51 to a vertical register 53, and a light receiving element I by the TG.・The vertical register 53 for temporarily storing the information charge from the vertical register 51, the horizontal register 54 and the on-deep amplifier 55 for reading out the information charge from the vertical register 53 as a CCD output signal in one horizontal scanning period (volume T) 4if. It consists of

If you mention the stay mode, after shooting,
That is, after the shutter closes, the information charges of the light-receiving element L- (not shown as nl, n2, . . . ) corresponding to the odd field are transferred to the vertical register 53, and then read out from the horizontal register 54 to 11-14i. The on-deep amplifier 55 converts the CCD output signal of the odd field into a signal. When all the odd field signals have been read out in this manner, the CCD output signals of even fields (indicated by ml, m2, . . . ) are read out during the next even field period. This kind of operation is called a frame mode, and the photoelectrically converted information charge in the frame mode is
shall be.

Next, in the field mode in the stay mode, the information charges of a pair of adjacent odd and even fields are added in the vertical register 53, output to the horizontal register 54, and output from the on-chip amplifier 55. If the information charge at this time is fit C2, then C+ = 'A C
It becomes 2.

Since the amount of accumulated charge is different between the frame mode of the stay mode and the field mode as in the case of -4 duplex, a switch circuit 56 and an amplifier 57 are provided to adjust the level of the CCD output signal. The switch circuit 56 is connected to the (1) side in the frame mode, and the read signal is made to the same level as in the field mode by the amplifier 57 and sent to the AGC or the like.

FIG. 7 is a schematic diagram of a MOS type solid-state image sensor.

As shown in the figure, the MOS type is composed of a light receiving element 61, a vertical scanning circuit 63, a horizontal scanning circuit 62, and the like. M.O.S.
The operation of the mold is well known and will not be explained here, but since it is basically an x-y scanning method, it uses the frame mode that is divided into two fields as described above, and the signal charges of two adjacent elements are added together. Field modes can be easily configured.

Since the signal level read out at that time is naturally different between both modes, it is necessary to adjust the signal level in each mode.

Therefore, it becomes possible to adjust the read signal level in both modes by using the switch circuit 65 via the amplifier 66 or not.

In the second embodiment, the brightness of the subject was detected using the CCD output, but it goes without saying that the brightness of the subject may also be detected using a dedicated photometric element.

〔Effect of the invention〕

As described above, the present invention includes a first mode in which signal charges in adjacent photoelectric conversion cells of a solid-state image sensor are added and read out, and a second mode in which each signal charge in each cell is read out.
Since both modes are switched depending on the brightness of the subject, it is possible to capture images with the optimal sensitivity corresponding to the brightness of the subject. Furthermore, the S/N ratio does not decrease even when it is dark, and when the scene is bright, high resolution can be obtained and a high-quality image signal can be obtained.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of a frame transfer type CCD, Figure 2 is a schematic diagram of a frame transfer type CCD.
The figures are control circuit diagrams of this embodiment, FIGS. 3 and 4. FIG. 5 is a circuit diagram showing the internal configuration of the switch circuit 30 of FIG. 2, FIG. 6 is a schematic diagram of an incline type CCD, and FIG. 7 is a schematic diagram of an MO3 type solid-state image sensor. In the figure, ■ is an imaging unit, 2 is a part of memory, 3 is a first horizontal shift register, 4 is a second horizontal shift register, 11
13 is a synchronous signal generator, 15 is a first mode switching circuit, 16 is an AE control section, and 17 is an AGC. 30 indicates switch circuits, respectively. Ina'3M Straw 4-(￥) Ao'

Claims (1)

[Scope of Claims] A solid-state image pickup device in which a plurality of photoelectric conversion cells are arranged in a matrix, and a first device that adds signal charges in adjacent photoelectric conversion cells and reads out a readout signal from the image pickup device. mode and a second mode for reading out the signal charges of each of the photoelectric conversion cells; a readout means for forming a control signal according to the brightness of the subject; Select mode 2,
and control means for controlling the readout means to select a first mode when it is relatively dark.