JPS6410984B2 - - Google Patents
Info
- Publication number
- JPS6410984B2 JPS6410984B2 JP57095125A JP9512582A JPS6410984B2 JP S6410984 B2 JPS6410984 B2 JP S6410984B2 JP 57095125 A JP57095125 A JP 57095125A JP 9512582 A JP9512582 A JP 9512582A JP S6410984 B2 JPS6410984 B2 JP S6410984B2
- Authority
- JP
- Japan
- Prior art keywords
- light receiving
- channel
- receiving section
- solid
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Description
【発明の詳細な説明】
本発明は電荷結合素子(CCD)型の固体撮像
素子に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a charge coupled device (CCD) type solid-state imaging device.
近年、テレビカメラに用いる為のこの種固体撮
像素子の開発が盛んに行なわれており、本願出願
人に於いても、すでに特願昭54−84267号にてク
ロスゲート型の固体撮像素子を提案している。 In recent years, this type of solid-state imaging device for use in television cameras has been actively developed, and the applicant has already proposed a cross-gate type solid-state imaging device in Japanese Patent Application No. 84267-1983. are doing.
第1図aに従来のクロスゲート型の固体撮像素
子の平面図、同図bに同図aに於けるA−A線断
面図、を示す。これ等の図に示す如く、従来素子
は、この場合P型の半導体基板1上に透明な絶縁
膜2を介し、絶縁状態で複数の上層電極3…と複
数の下層電極4…とを直交配置せしめ、これ等上
層及び下層電極3…,4…、で囲まれる隙間を光
入射窓として構成し、この入射窓に依つて露出し
た半導体基板1箇所を受光部11…として構成し
たものである。そして、この半導体基板1には、
この場合上層電極3…に沿つて該基板1より高不
純物濃度のチヤンネルストツパ12…が形成され
ており、各ストツパ12は上記受光部11…に接
する箇所の一つおきに、その巾が拡張され、これ
に依つて、隣接するチヤンネルストツパ12…と
相補的な凹凸を形成している。さらに、このチヤ
ンネルストツパ12…間に残存した上記各電極3
…,4…下のP型の半導体基板1箇所がチヤンネ
ル13…を形成し、これ等各チヤンネル13…は
夫々直線的に配列した複数の上記受光部11…に
接して蛇行している。 FIG. 1a shows a plan view of a conventional cross-gate solid-state imaging device, and FIG. 1b shows a cross-sectional view taken along line A--A in FIG. 1a. As shown in these figures, in the conventional element, a plurality of upper layer electrodes 3 and a plurality of lower layer electrodes 4 are orthogonally arranged on a P-type semiconductor substrate 1 in an insulated state with a transparent insulating film 2 interposed therebetween. The gap surrounded by these upper and lower layer electrodes 3, 4, . Then, on this semiconductor substrate 1,
In this case, channel stoppers 12 with a higher impurity concentration than the substrate 1 are formed along the upper layer electrodes 3, and the width of each stopper 12 increases at every other point where it contacts the light receiving section 11. As a result, unevenness is formed that is complementary to the adjacent channel stoppers 12. Furthermore, each of the above-mentioned electrodes 3 remaining between the channel stoppers 12...
. . , 4 . . . One location of the lower P-type semiconductor substrate forms a channel 13 . . . , and each of these channels 13 .
斯様な構成の固体撮像素子は、奇数列の下層電
極4′…をONにした状態で、受光部11…で発
生する入射光量に応じた電荷を第1図の実線矢印
で示す如く、この受光部11,11…から下層電
極4′下のチヤンネル13位置○アに導入する。そ
の後、偶数列の上層電極3″…と偶数列の下層電
極4″…とを、次に奇数列の上層電極3′と奇数列
の下層電極4′とを、交互にON状態に切り換え
る事に依つて、上述の電荷はチヤンネル13位置
○アから○イ、○ウ、○エ、○オ、…と蛇行して転送さ
れ、
斯る素子の出力端(図示せず)から画像信号とし
て外部へ出力される。 In a solid-state image sensor having such a configuration, when the lower electrodes 4' in odd-numbered rows are turned on, the charge corresponding to the amount of incident light generated in the light receiving section 11 is generated as shown by the solid line arrow in FIG. The light is introduced from the light receiving sections 11, 11, . After that, the upper layer electrodes 3'' of the even number rows and the lower layer electrodes 4'' of the even number rows, and then the upper layer electrodes 3' of the odd number rows and the lower layer electrodes 4' of the odd number rows are alternately switched to the ON state. Therefore, the above charge is transferred in a meandering manner from channel 13 position ○A to ○I, ○U, ○E, ○O,...
The output terminal (not shown) of such an element is outputted to the outside as an image signal.
上述の如き従来の固体撮像素子は、受光部11
に電極がないので、入射光を減衰せしめる事なく
直接受光できる利点を備えているが、この受光部
11のポテンシヤルを制御できず、周囲の電極3
…,4…の印加電圧の影響を受けて、受光部11
のポテンシヤルは非常に不安定なものとなる欠点
があつた。即ち、例えばチヤンネル13位置○ウに
転送されている電荷が次の位置○エ、○オに転送され
ようとする時、チヤンネル13と同導電型の受光
部11に形成される不安定なポテンシヤルに依つ
て、この受光部11がチヤンネル化されてしま
い、第1図の破線矢印で示す如く、転送電荷が受
光部11をバイパスして位置○アに逆流してしまう
惧れがあつた。 The conventional solid-state image sensor as described above has a light receiving section 11.
Since there are no electrodes, it has the advantage of being able to directly receive incident light without attenuating it, but the potential of this light receiving section 11 cannot be controlled, and the surrounding electrodes 3
..., 4..., the light receiving section 11
The drawback was that the potential was extremely unstable. That is, for example, when the charge being transferred to the channel 13 position ○U is about to be transferred to the next position ○E, ○O, the unstable potential formed in the light receiving part 11 of the same conductivity type as the channel 13 As a result, the light receiving section 11 would become a channel, and there was a risk that the transferred charge would bypass the light receiving section 11 and flow back to position ○A, as shown by the broken line arrow in FIG.
本発明は斯る点に鑑みて為されたものであり、
電荷転送時に於いて受光部がチヤンネル化される
事のないクロスゲート型の固体撮像素子を提供す
るものである。 The present invention has been made in view of these points,
An object of the present invention is to provide a cross-gate type solid-state image sensor in which a light receiving section is not channelized during charge transfer.
第2図aに本発明の固体撮像素子の平面図を示
し、同図bにそのA′−A′線断面図を示す。 FIG. 2a shows a plan view of the solid-state imaging device of the present invention, and FIG. 2b shows a sectional view taken along the line A'-A'.
これ等の図に於いて、1,2,3,4は第1図
と同様にP型の半導体基板、絶縁膜、上層電極、
下層電極を示しており、この半導体基板1には従
来素子と同じく高濃度のP+型のチヤンネルスト
ツパ12…、P型のチヤンネル13…が形成され
ている。本発明実施例の固体撮像素子が従来素子
と異なる所は、チヤンネル13…即ち基板1より
高不純物濃度の受光部14…を形成した点にあ
る。即ち、上層及び下層電極3…,4…、下に蛇
行して設けられたP型のチヤンネル13…に接し
て高濃度のP+型の受光部14…を形成し、この
受光部14…での電荷、この場合電子に対するポ
テンシヤルをチヤンネル13…でのそれより小さ
く設定した点にある。 In these figures, 1, 2, 3, and 4 are a P-type semiconductor substrate, an insulating film, an upper layer electrode,
A lower layer electrode is shown, and high concentration P + type channel stoppers 12 . . . and P type channels 13 . . . are formed on this semiconductor substrate 1 as in the conventional device. The solid-state imaging device according to the embodiment of the present invention differs from the conventional device in that a channel 13, that is, a light-receiving portion 14 having a higher impurity concentration than the substrate 1 is formed. That is, a high concentration P + type light receiving section 14 is formed in contact with the upper layer and lower layer electrodes 3..., 4... and the P type channel 13... provided in a meandering manner below, and this light receiving section 14... The point is that the charge, in this case the potential for electrons, is set smaller than that in channels 13...
斯様な本発明素子の一例を具体的数値を挙げて
説明する。半導体基板1として比抵抗10〜20Ωcm
のP型シリコンを用い、高濃度のP+型のチヤン
ネルストツパ12は該基板1にボロンを80KeV
でイオン注入し、その濃度を2×1016/cm3とした
ものである。その後、基板1表面を熱酸化して二
酸化シリコンからなる厚さ1400Åの透明な絶縁膜
2を形成し、さらにその上からボロンを80KeV
でイオン注入し、チヤンネル13より高濃度の
P+型の受光部11…を形成する。 An example of such a device of the present invention will be explained by citing specific numerical values. Specific resistance 10~20Ωcm as semiconductor substrate 1
The channel stopper 12 is made of P type silicon with a high concentration of P + type, and boron is applied to the substrate 1 at 80 KeV.
The ions were implanted at a concentration of 2×10 16 /cm 3 . After that, the surface of the substrate 1 is thermally oxidized to form a transparent insulating film 2 made of silicon dioxide with a thickness of 1400 Å, and boron is further applied on top of it at a voltage of 80 KeV.
ion implantation with higher concentration than channel 13.
A P + type light receiving section 11 is formed.
斯る本発明構成に依れば、P+型の受光部14
…で入射光量に応じて発生した電荷、この場合電
子は、第2図の実線矢印で示す如く、正の電圧が
印加されON状態にある奇数列の下層電極4′下
のチヤンネル12位置○アに貯えられる。以後各電
極3…,4…に順次正の電圧を印加する事に依つ
て、チヤンネル13位置○イ、○ウ、○エ、○オ、…と
電
子を転送する事になるが、この時、受光部14…
はP型のチヤンネル13…とは異なりP+型領域
であるので、各電極3…,4…に印加される正電
圧の影響を受けて受光部14…に形成されるポテ
ンシヤルを、チヤンネル13…に形成されるポテ
ンシヤルより十分に小さくすることができる。従
つて、P型のチヤンネル13内を転送中の電子が
P+型の受光部14をバイパスして逆流する惧れ
はない。 According to the configuration of the present invention, the P + type light receiving section 14
The charges generated according to the amount of incident light, in this case electrons, are located at the channel 12 position ○A under the lower electrode 4' of the odd row where a positive voltage is applied and is in the ON state, as shown by the solid line arrow in Figure 2. can be stored in Thereafter, by sequentially applying a positive voltage to each electrode 3..., 4..., electrons will be transferred to channel 13 positions ○I, ○U, ○E, ○O, etc., but at this time, Light receiving section 14...
is a P + type region, unlike the P type channels 13..., so the potentials formed in the light receiving parts 14... under the influence of the positive voltages applied to the respective electrodes 3..., 4... are the channels 13... can be made sufficiently smaller than the potential formed in Therefore, the electrons being transferred in the P-type channel 13 are
There is no risk that the light will bypass the P + type light receiving section 14 and flow backward.
上述の実施例に於いては、P型半導体基板1を
そのままチヤンネル13として用いたが、第3図
の断面図に示す如くP型半導体基板1に燐等のイ
オン注入に依つて蛇行したN型のチヤンネル15
を形成した固体撮像素子の場合に於いても、この
チヤンネル15とは逆導電型のP型の受光部16
を備えれば、第2図に示した実施例素子と同様に
この受光部16に、転送電荷、この場合電子に対
する不安定なポテンシヤルが形成される惧れがな
い。従つて電荷転送時に於ける受光部16のチヤ
ンネル化が防止される。 In the above embodiment, the P-type semiconductor substrate 1 was used as it was as the channel 13, but as shown in the cross-sectional view of FIG. channel 15
Even in the case of a solid-state image sensing device formed with
With this, there is no risk that an unstable potential for transfer charges, in this case electrons, will be formed in the light receiving section 16, as in the example element shown in FIG. Therefore, the light receiving section 16 is prevented from becoming a channel during charge transfer.
本発明の固体撮像素子は以上の説明から明らか
な如く、クロスゲート型の素子であつて、蛇行し
たチヤンネルに接して設けられる受光部をチヤン
ネルに比してポテンシヤルが形成され難い不純物
領域にて構成したものであるので、上記受光部
は、チヤンネルのポテンシヤル制御用電極への印
加電圧の影響を受けて不要なポテンシヤルを形成
する惧れはなく、これに依つて従来素子で発生し
ていた転送電荷の逆流等の事故が防止できる。従
つて、逆流電荷に依るノイズのない良質な画像信
号が得られる。 As is clear from the above description, the solid-state imaging device of the present invention is a cross-gate type device, and the light-receiving portion provided in contact with the meandering channel is composed of an impurity region in which it is difficult to form a potential compared to the channel. Therefore, there is no risk that the light receiving section will form an unnecessary potential due to the influence of the voltage applied to the potential control electrode of the channel, and thereby the transfer charge generated in conventional elements can be reduced. Accidents such as backflow of water can be prevented. Therefore, a high-quality image signal free from noise caused by backflow charges can be obtained.
第1図a及びbは従来の固体撮像素子の平面図
及びその断面図、第2図a及びbは本発明の固体
撮像素子の一実施例の平面図及びその断面図、第
3図は本発明素子の他の実施例の断面図、であ
る。
1……半導体基板、2……絶縁膜、3……上層
電極、4……下層電極、11,14,16……受
光部、12……チヤンネルストツパ、13,15
……チヤンネル。
1A and 1B are a plan view and a sectional view thereof of a conventional solid-state image sensor, FIGS. 2A and 2B are a plan view and a sectional view thereof of an embodiment of the solid-state image sensor of the present invention, and FIG. FIG. 7 is a cross-sectional view of another embodiment of the inventive element. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Insulating film, 3... Upper layer electrode, 4... Lower layer electrode, 11, 14, 16... Light receiving section, 12... Channel stopper, 13, 15
...Channel.
Claims (1)
縁膜と、該絶縁膜上に並行して配列された複数本
の下層電極と該下層電極上に絶縁して設けられた
該下層電極の配列方向と交差する方向に配列され
た複数本の上層電極とからなり上記両電極とで囲
まれる隙間を光入射窓として受光部を構成し、該
受光部に隣接して蛇行する電荷転送用のチヤンネ
ルを備えた固体撮像素子に於いて、上記受光部の
半導体箇所の導電型あるいは不純物濃度を上記チ
ヤンネルのそれと異ならしめ、各電極に電荷転送
用の正の電圧を印加したとき、該電極下のチヤン
ネルのポテンシヤルに比して上記受光部の半導体
箇所のポテンシヤルが小さくなるよう設定したこ
とを特徴とする固体撮像素子。1. A semiconductor substrate, an insulating film formed on the semiconductor substrate, a plurality of lower layer electrodes arranged in parallel on the insulating film, and an arrangement direction of the lower layer electrodes provided insulated on the lower layer electrode. a plurality of upper layer electrodes arranged in a direction intersecting with the upper layer electrodes, a gap surrounded by the two electrodes is used as a light entrance window to constitute a light receiving section, and a meandering channel for charge transfer is provided adjacent to the light receiving section. In the solid-state imaging device equipped with the above-mentioned solid-state image sensor, when the conductivity type or impurity concentration of the semiconductor portion of the light receiving section is made different from that of the channel, and a positive voltage for charge transfer is applied to each electrode, the channel under the electrode is A solid-state imaging device characterized in that the potential of the semiconductor portion of the light receiving portion is set to be smaller than the potential of the semiconductor portion of the light receiving portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57095125A JPS58212270A (en) | 1982-06-02 | 1982-06-02 | Solid-state image pickup element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57095125A JPS58212270A (en) | 1982-06-02 | 1982-06-02 | Solid-state image pickup element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58212270A JPS58212270A (en) | 1983-12-09 |
| JPS6410984B2 true JPS6410984B2 (en) | 1989-02-22 |
Family
ID=14129102
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57095125A Granted JPS58212270A (en) | 1982-06-02 | 1982-06-02 | Solid-state image pickup element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58212270A (en) |
-
1982
- 1982-06-02 JP JP57095125A patent/JPS58212270A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58212270A (en) | 1983-12-09 |
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