JPS64143U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a hardware block diagram of an embodiment of the dual system information transmission device according to this invention, Fig. 2 is a flowchart when rewriting the fixed disk shown in Fig. 1, and Fig. 3 is a hardware block diagram of the conventional device. The wear block diagram, FIG. 4, shows the flowchart of FIG. 3. In the figure, 1a and 1b are central processing units, 2a
, 2b are fixed disk control devices, 3a, 3b are fixed disks, 4a, 4b are fixed disk control devices for other systems, 5a, 5b are fixed disk cross-call mechanisms, 6a, 6b are computer coupling devices, 7a, 7b
is a man-machine interface, 8a and 8b are interrupt receiving modules, 9a and 9b are main memories, and 10
a and 10b are DAM interfaces, 11 is a fixed disk controller, 12 is a fixed disk cross call mechanism, 13a and 13b are interrupt receiving modules, 14a and 14b are main memories, 15a,
15b indicates a DMA controller. In each figure, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Scope of utility model registration request] In addition to two independent processing units, there is a DMA controller that transfers the data of each system to the active and standby main memory, an interrupt reception module that accepts transfer requests, and a fixed disk that controls the fixed disks of the active and standby systems. A dual system information transmission device characterized by comprising a fixed disk controller equipped with a cross-call mechanism.