JPS641472A - Booster circuit - Google Patents
Booster circuitInfo
- Publication number
- JPS641472A JPS641472A JP15483987A JP15483987A JPS641472A JP S641472 A JPS641472 A JP S641472A JP 15483987 A JP15483987 A JP 15483987A JP 15483987 A JP15483987 A JP 15483987A JP S641472 A JPS641472 A JP S641472A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- booster circuit
- boosted
- trn
- inverters
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of DC power input into DC power output
- H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
- H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
- H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
- H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
- H02M3/073—Charge pumps of the Schenkel-type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Dc-Dc Converters (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE: To obtain a plurality of boosted voltages, by varying the number of boosting stages in a booster circuit.
CONSTITUTION: A charge pump type booster circuit is constituted with N-channel transistor(Tr) No-Nn and capacitors C1∼Cn, and when drain voltage of Tr is boosted through clock signals ϕ1, ϕ1' and a capacitor C, charges are transferred sequentially to next stage Tr to produce a higher voltage than a source voltage VDD at the output end. NAND gates 1, 2 and inverters 3, 4 are provided, and control signals are fed respectively to NAND gates 1, 2. Since the outputs from the inverters 3, 4 are fixed at L when the control signal is L, boosting operation of TrNn-1, Nn is not carried out and a voltage lower than the output voltage to be produced when the control signal is H by the threshold voltage of TrNn-1, Nn is outputted thus providing a plurality of boosted voltages.
COPYRIGHT: (C)1989,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62-154839A JPH011472A (en) | 1987-06-22 | boost circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62-154839A JPH011472A (en) | 1987-06-22 | boost circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS641472A true JPS641472A (en) | 1989-01-05 |
| JPH011472A JPH011472A (en) | 1989-01-05 |
Family
ID=
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5065101A (en) * | 1990-03-07 | 1991-11-12 | Nec Electronics, Inc. | Mini-relay or reed relay tester |
| WO2000060419A1 (en) * | 1999-04-01 | 2000-10-12 | Seiko Epson Corporation | Electronic apparatus and method for controlling electronic apparatus |
| US7532061B2 (en) * | 2005-05-20 | 2009-05-12 | Giancarlo Ragone | Charge-pump type, voltage-boosting device with reduced ripple, in particular for non-volatile flash memories |
| US7586361B2 (en) * | 2003-12-25 | 2009-09-08 | Kabushiki Kaisha Toshiba | Semiconductor device comprising a charge pump operated by clock signals |
| CN107171547A (en) * | 2017-05-15 | 2017-09-15 | 合肥恒烁半导体有限公司 | A kind of charge pump and FLAS memories |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5065101A (en) * | 1990-03-07 | 1991-11-12 | Nec Electronics, Inc. | Mini-relay or reed relay tester |
| WO2000060419A1 (en) * | 1999-04-01 | 2000-10-12 | Seiko Epson Corporation | Electronic apparatus and method for controlling electronic apparatus |
| US7586361B2 (en) * | 2003-12-25 | 2009-09-08 | Kabushiki Kaisha Toshiba | Semiconductor device comprising a charge pump operated by clock signals |
| US7532061B2 (en) * | 2005-05-20 | 2009-05-12 | Giancarlo Ragone | Charge-pump type, voltage-boosting device with reduced ripple, in particular for non-volatile flash memories |
| CN107171547A (en) * | 2017-05-15 | 2017-09-15 | 合肥恒烁半导体有限公司 | A kind of charge pump and FLAS memories |
| CN107171547B (en) * | 2017-05-15 | 2019-04-02 | 合肥恒烁半导体有限公司 | A kind of charge pump and FLAS memory |
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