JPS6419772A - Manufacture of vertical mosfet - Google Patents

Manufacture of vertical mosfet

Info

Publication number
JPS6419772A
JPS6419772A JP62174721A JP17472187A JPS6419772A JP S6419772 A JPS6419772 A JP S6419772A JP 62174721 A JP62174721 A JP 62174721A JP 17472187 A JP17472187 A JP 17472187A JP S6419772 A JPS6419772 A JP S6419772A
Authority
JP
Japan
Prior art keywords
gate electrode
insulating film
conductivity type
silicon substrate
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62174721A
Other languages
Japanese (ja)
Inventor
Noriyuki Takao
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62174721A priority Critical patent/JPS6419772A/en
Publication of JPS6419772A publication Critical patent/JPS6419772A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291—Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs

Landscapes

  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To reduce ON resistance by a method wherein a required thickness of insulating film is formed on both sides of a gate electrode during the process of forming a source region and said insulating film and gate electrode serve as a mask in a process of impurity ion implantation and drive-in for a decrease in input capacity. CONSTITUTION:A gate oxide film 2 is formed on a silicon substrate 1 of one conductivity type, after which polycrystalline silicon is allowed to grow and is etched into a gate electrode 3 of a required geometry. By the CVD method or the like, a 1000-2000Angstrom -thick insulating film 6 is formed on the surface of and side walls of the gate electrode 3. The insulating film 6 and the gate electrode 3 serve as a mask in a process wherein an impurity of the other conductivity type is implanted into the silicon substrate 1 by high-energy ion implantation that is accomplished at 100keV-1MV. Drive-in is accomplished for the formation of a base region 4. Finally, by a similar process, a source region 5 is formed, the same as the silicon substrate 1 in conductivity type.
JP62174721A 1987-07-15 1987-07-15 Manufacture of vertical mosfet Pending JPS6419772A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62174721A JPS6419772A (en) 1987-07-15 1987-07-15 Manufacture of vertical mosfet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62174721A JPS6419772A (en) 1987-07-15 1987-07-15 Manufacture of vertical mosfet

Publications (1)

Publication Number Publication Date
JPS6419772A true JPS6419772A (en) 1989-01-23

Family

ID=15983488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62174721A Pending JPS6419772A (en) 1987-07-15 1987-07-15 Manufacture of vertical mosfet

Country Status (1)

Country Link
JP (1) JPS6419772A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023414A (en) * 1989-03-28 1991-06-11 Matsushita Electric Works, Ltd. Electrical switch for detecting positions of an automatic transmission of an automobile
JPH05243275A (en) * 1992-03-03 1993-09-21 Nec Corp Manufacture of vertical mosfet
JPH08186470A (en) * 1994-12-30 1996-07-16 Nec Corp Hum filter device for patient monitor device
EP0865080A3 (en) * 1997-03-11 1998-10-28 Harris Corporation MOS-gated semiconductor devices
WO2013027502A1 (en) * 2011-08-19 2013-02-28 住友電気工業株式会社 Method for manufacturing silicon carbide semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5023414A (en) * 1989-03-28 1991-06-11 Matsushita Electric Works, Ltd. Electrical switch for detecting positions of an automatic transmission of an automobile
JPH05243275A (en) * 1992-03-03 1993-09-21 Nec Corp Manufacture of vertical mosfet
JPH08186470A (en) * 1994-12-30 1996-07-16 Nec Corp Hum filter device for patient monitor device
EP0865080A3 (en) * 1997-03-11 1998-10-28 Harris Corporation MOS-gated semiconductor devices
WO2013027502A1 (en) * 2011-08-19 2013-02-28 住友電気工業株式会社 Method for manufacturing silicon carbide semiconductor device

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