JPS6427723U - - Google Patents
Info
- Publication number
- JPS6427723U JPS6427723U JP12185887U JP12185887U JPS6427723U JP S6427723 U JPS6427723 U JP S6427723U JP 12185887 U JP12185887 U JP 12185887U JP 12185887 U JP12185887 U JP 12185887U JP S6427723 U JPS6427723 U JP S6427723U
- Authority
- JP
- Japan
- Prior art keywords
- oscillation
- channel
- external terminals
- transmission gate
- channel mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Microcomputers (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
は従来例を示す回路図である。
１２…ＲＣ発振回路、１６…セラミツク発振回
路、２１，２２…トランスミツシヨンゲート。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional example. 12...RC oscillation circuit, 16...Ceramic oscillation circuit, 21, 22...Transmission gate.
Claims (1)
部端子の一方に入力が接続された発振形式の異な
る複数の発振回路と、該発振回路の各々の出力と
前記外部端子の他方の間に設けられゲート電極に
切換制御信号が印加されるトランスミツシヨンゲ
ートとを備えた発振形式切換回路に於いて、前記
各発振回路の出力段を構成するＰチヤンネルＭＯ
ＳとＮチヤンネルＭＯＳの接続点を分離すると共
に前記トランスミツシヨンゲートを構成するＰチ
ヤンネルＭＯＳとＮチヤンネルＭＯＳの一方の接
続点を分離し、各々のＰチヤンネル同志及び各々
のＮチヤンネル同志を接続することを特徴とする
発振形式切換回路。 two external terminals to which an oscillation element is connected, a plurality of oscillation circuits with different oscillation formats whose inputs are connected to one of the external terminals, and between the output of each of the oscillation circuits and the other of the external terminals. In an oscillation type switching circuit comprising a transmission gate and a transmission gate to which a switching control signal is applied to the gate electrode, a P channel MO constituting an output stage of each of the oscillation circuits.
The connection point between the S and N channel MOS is separated, and the connection point between one of the P channel MOS and the N channel MOS constituting the transmission gate is separated, and each P channel and each N channel are connected together. An oscillation format switching circuit characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12185887U JPH0441374Y2 (en) | 1987-08-08 | 1987-08-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12185887U JPH0441374Y2 (en) | 1987-08-08 | 1987-08-08 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6427723U true JPS6427723U (en) | 1989-02-17 |
| JPH0441374Y2 JPH0441374Y2 (en) | 1992-09-29 |
Family
ID=31369252
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12185887U Expired JPH0441374Y2 (en) | 1987-08-08 | 1987-08-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0441374Y2 (en) |
-
1987
- 1987-08-08 JP JP12185887U patent/JPH0441374Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0441374Y2 (en) | 1992-09-29 |
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