JPS6430376A - Channel selection display circuit for television - Google Patents

Abstract

PURPOSE:To generate always one piece of channel display bar image even if the number of the horizontal picture elements of an image display is modified by detecting the coincidence between an output from an updown counter that counts clock signals from a channel selection control circuit and an output from the clock signal counter of a timing generation circuit. CONSTITUTION:The following are provided; the channel selection control circuit 10 to generate a clock signal at the time of channel selection, the updown counter 11 to count clock signals, a D/A converter 12 to convert a digital output signal from the counter 11 to a DC voltage, an electronic tuner 1, and a synchronizing separator circuit 5 to take out a synchronizing signal 15 from a video signal 14. Also the following are provided; the timing generation circuit 6, a counter 8 which counts clock signal 17 from the circuit 6 and is reset by a reset signal 18, and a channel selection display and superimposing circuit 3 that superimposes an output from a coincidence detection circuit 9 that detects the coincidence between an output from the counter 11 and that from the counter 8 as a selected channel display signal 19 on said video signal 14. As a result, even when the number of the horizontal picture elements of an image display is modified, the frequency division ratio of a clock signal inputted to a counter for selected channel display does not need to be changed, and always one piece of channel selection display bar picture element is generated.