JPS643060B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ceramic laminated package for semiconductor devices, and more particularly to an improved grounding structure.

Conventionally, a structure in which electrical connections inside a ceramic laminated package for a semiconductor device is constituted by a bonding pad, an inner layer metallized path, a through hole, and an outer lead has been widely put into practical use. Moreover, especially when a common ground electrode structure is required, inner layer patterns are disposed on a wide range of surfaces such as chip bonding surfaces.
FIG. 1 is a cross-sectional view showing one embodiment, in which a common ground electrode pattern 2 and an inner layer path 3 following it are formed on a first ceramic layer 1, and a bonding pad 5 of a second ceramic layer 4 and a common ground electrode pattern 2 are formed on the second ceramic layer 4. An inner layer pass 6 is formed following the inner layer passes 3 and 6 of the two layers.
The ceramic layers 1 and 4 are connected to an external lead 8 via a through hole 7 provided therein. The seal pattern 10 surrounding the opening of the third ceramic layer 9 is used to solder the lid 12 made of a metal plate after the connection between the semiconductor element 11 and the package is completed to make the package hermetically sealed. It is provided.

However, in ceramic laminated structure packages, tungsten W, molybdenum
Because a high-melting point metal such as _M0 is used, its cross-sectional area is restricted, and plating is not allowed, the resistance of the inner layer path is high, which prevents the reduction of ground resistance. There is.

Furthermore, in the structure of the above embodiment, the air-cooled heat dissipation fins 13 are generally installed on the metal plate 12, but in this structure, the heat conduction path between the semiconductor element and the heat dissipation fins is detoured, resulting in high heat generation. It has resistance.

The present invention aims to solve the above-mentioned problems in conventional ceramic laminated packages, namely to reduce ground resistance and thermal resistance.

In the present invention, external leads are drawn out from the opening seal surface of a package having a ceramic laminated structure, and the seal pattern and the ground electrode pattern are integrated.
Shorten the electrical connection path inside the package to reduce grounding resistance. Furthermore, the ceramic substrate of the package is located at the top of the package, and the semiconductor element is directly connected to the heat dissipation fins through this substrate, thereby minimizing the thermal resistance inside the package, thereby achieving the above object.

The invention will be explained in more detail by the embodiment shown in FIGS. 2a and 2b.

FIG. 2a is a sectional view of one embodiment of the present invention, and FIG. 2b is a plan view thereof, and A-A indicates the cutting position in FIG. 2a. In the present invention, the semiconductor element 14
The opening of the package cage that accommodates the external lead 15,
16 drawer surfaces. However, the external lead 16 is a common ground lead.

In this embodiment, the electrode to be grounded of the semiconductor element 14 is connected to a predetermined position in the group of bonding pads 17 of the package by the wire bonding method. It is connected to the seal pattern 20 via. However, as is clear from the figure, the bonding pad 17 and the seal pattern 20 are provided adjacent to each other, and the inner layer pattern 18 has a longer length (grounding route due to the short circuit structure) than in the conventional structure as shown in FIG. ) has been significantly shortened.

Further, the seal pattern 20 also functions as a common ground electrode, as described above, and the common ground lead 16 is connected to the extension 21 of the seal pattern 20.

According to this embodiment, the conduction resistance, which was conventionally about 300 to 800 mΩ, was reduced to 500 to 100 mΩ.

In this embodiment, the entire package has a structure that is an inversion of the structure shown in FIG. 1 so that the extension 21 of the conductive seal pattern 20 extending to the external lead is not exposed to the outside when the package is mounted. The structure is also different. That is, in the package of this embodiment, the heat radiation fin 22 is directly connected to the semiconductor element 14 through the ceramic substrate 23, as shown in FIG. 2a.

As a result, compared to the conventional method shown in FIG. 1, the heat conduction path length is shortened, the cross-sectional area is increased, and the heat dissipation effect is greatly improved.

Comparing these two types of bonding methods for heat dissipation fins, the method of this example is found to be 3 to 3 times larger than the method shown in FIG.
Thermal resistance is reduced by 5°C/w.

The heat dissipation effect can also be improved with respect to a package structure in which the external leads are drawn out to the end face of the package side.
When the external lead is bent and guided toward the sealing surface, it is possible to obtain the same result as in this embodiment.

As explained above, the present invention shortens the grounding path by drawing out the external leads from the opening sealing surface of the ceramic laminated structure package and integrating the sealing pattern and the grounding electrode pattern.
This method reduces the grounding resistance and further maximizes the heat dissipation effect by directly connecting the semiconductor element and the heat dissipation fin with a ceramic substrate, and has a great effect on semiconductor devices, especially highly integrated ICs.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment according to the prior art;
FIG. 2a is a sectional view showing an embodiment of the present invention, and FIG. 2b is a plan view thereof. In the figure, 1 is the first ceramic layer, 2 is a common ground electrode pattern, 3 is an inner layer pass, 4 is a second ceramic layer, 5 is a bonding pad, 6 is an inner layer pass, 7 is a through hole, and 8 is an external layer. lead, 9
is the third ceramic layer, 10 is the seal pattern,
11 is a semiconductor element, 12 is a lid, 13 is a heat radiation fin, 14 is a semiconductor element, 15 is an external lead, 16
is the common ground lead, 17 is the bonding pad,
18 is an inner layer pattern, 19 is a through hole, 20
21 is a seal pattern, 21 is an extension of the seal pattern, 22 is a heat radiation fin, and 23 is a ceramic substrate.

Claims (1)

[Scope of Claims] 1. An opening of a package that accommodates the semiconductor element 14 provided on the extraction surface of the external leads 15 and 16, and a lid that seals the opening via a conductive seal pattern 20; A grounding bonding pad 17 for connecting an electrode to be grounded of the element 14; and an inner layer pattern and a through layer connected to the grounding bonding pad 17 for short-circuiting the grounding bonding pad 17 to the seal pattern 20. A package comprising a hole and an extension of the seal pattern for connection to the external lead, and further comprising a cooling heat dissipation fin directly bonded to the opposite surface of the package opening.