JPS643084B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an FM detector that exhibits excellent performance even in FM receivers using low voltage power supplies.

Traditionally, semiconductor integrated circuits (hereinafter referred to as ICs)
When incorporating an FM detector, the quadrature detection method shown in Figure 1 is used as the detection method. In Figure 1, terminals A and B are detector input terminals, terminals C, D, and E are inductor 101 and resonant circuit 10.
2. Connection terminals of the phase shift circuit constituted by the bypass capacitor 103: terminal H is a power supply terminal, terminal G is a ground terminal, and terminal F is an FM demodulation output terminal.

In the quadrature detection method, transistor 1,
An FM intermediate frequency signal having a reference phase is added to the base of 2, and one of its outputs is shifted in phase with respect to the reference phase by a phase circuit according to the frequency value, and these phase-shifted signals are generated. and the non-phase shifted signal are respectively input to a multiplier formed by transistors 5, 6, etc., and the output of this multiplier is taken out via a load resistor 7 from a terminal F as an FM demodulated output signal.

The quadrature detection method shown in Figure 1 exhibits excellent performance when used with a power supply voltage of about 12V, such as for stereo applications, but it is not suitable for applications such as portable radios or cassette tape recorders with radios. However, when used at a low power supply voltage (2 to 6 V), sufficient performance cannot be achieved. That is, in order for transistors 5 and 6 forming the multiplier and transistors 1 and 2 forming the differential amplifier to be biased normally in FIG. is necessary. Therefore, when the quadrature detection method, which is a conventional FM detection method, is used with a low voltage power supply (particularly when the power supply voltage is 3 V or less), its performance deteriorates significantly and it cannot be used.

The present invention provides a new FM detection method with extremely excellent power supply voltage characteristics that hardly deteriorates in performance even with a low voltage power supply (3V or less).

An FM demodulation circuit according to the present invention includes: an FM intermediate frequency amplifier that amplifies an FM intermediate frequency signal and generates first and second signals having opposite phases at the output thereof; 1 signal and centering the phase of the first signal.
a phase shift circuit that generates a phase shift signal by shifting the signal by an amount corresponding to the deviation of the frequency of the signal with respect to the FM intermediate frequency; a first OR circuit that generates an output that follows; a second OR circuit that receives the same signal as the second signal and the phase shift signal and generates an output that follows a dominant voltage among them; a first low frequency circuit that integrates the output of the first OR circuit; and a second low frequency circuit that integrates the output of the second OR circuit.
The present invention is characterized by comprising a low frequency circuit, and circuit means for generating an FM demodulated signal by taking the difference between the outputs of the first and second low frequency circuits.

Here, the principle of the present invention will be explained with reference to the principle diagram of the present invention shown in FIG.

In Figure 2, terminal T is connected to the FM intermediate frequency (hereinafter referred to as
(abbreviated as FMIF) signal input terminal, terminals U and V are connection terminals of the phase shift circuit 22, and terminal D is a demodulation output terminal. Two outputs are taken out from the FMIF amplifier 21, a positive phase output and an inverted output, whose phases are inverted to each other, and one output is as follows.
A predetermined amount of phase is shifted from the input terminal U of the phase shift circuit 22 from the terminal V through the phase shift circuit 22, and is applied to the OR circuits 23 and 24 via the L point, and also directly to the OR circuit 23 via the M point. Added. The other output is directly applied to the OR circuit 24 via the N point. Here, OR circuits 23 and 24
performs an operation in which the output signal follows the input signal having the more dominant potential of the two input signals.

The outputs of the OR circuits 23 and 24 are applied to low-pass filters 25 and 26 connected to the next stage via points P and Q, respectively, and are further applied to low-pass filters 25 and 26 connected to the next stage via points P and Q, respectively, and
The signal is applied to the positive phase and negative phase input terminals of the low frequency amplifier 27 through the point. Here, the low frequency amplifier 27 constitutes an adder circuit that substantially subtracts both signals. The output of the low frequency amplifier 27 is
It is taken out from terminal O as an FM demodulated output.

Here, an additional explanation will be added regarding the phase shift circuit 22.

Figure 3 shows the phase characteristics of the phase shift circuit.
The phase shift amount φ (radians) on the vertical axis indicates the phase shift amount of the signal at terminal V when the phase of the FMIF signal at terminal U in FIG. Indicates the frequency deviation value of the FMIF signal. As can be seen from FIG. 3, the phase shift amount φ changes almost symmetrically from 0 degrees to 180 degrees around -90 degrees at the center frequency c. here,
If the voltage waveforms at points L, M, and N are sine waves, their phase relationships can be assumed as shown in FIG. 4 as l, m, and n, respectively. However, the amplitude of each voltage waveform is normalized to 1 [V].

Also, if the voltage at point M is V ₁ , the voltage at point N is V ₂ , and the voltage at point L is V ₃ , V ₁ , V ₂ , V ₃ are (1), (2), (3)
It is given by Eq.

V ₁ = sin θ ……(1) V ₂ = −sin θ ……(2) V ₃ = sin(θ−π+φ) ……(3) On the other hand, P, Q which are the outputs of OR circuits 23 and 24
Since the voltage at the point is configured to follow the dominant voltage among the input signal voltages, the voltage waveforms are shown in FIGS. 5 and 6, respectively.

Next, when the voltage waveforms at points P and Q are passed through low-pass filters 25 and 26, they are averaged and the DC voltages R and S
Each point appears. At this time, if the DC voltages at points R and S are X and Y, then X and Y are respectively
It is expressed by equations (4) and (5).

X=1/2π [∫ ^a _p V ₁ dθ+∫ ^b _a V ₃ dθ+∫ ^c=2 〓 _b V ₁ dθ]
=2/π cos φ/2 ...(4) Y=1/2π [∫ ^d _p (−V ₁ ) dθ+∫ ^e _d V ₃ dθ+∫ ^c _e (−V
₁ ) dθ〕 = 2/πsinφ/2 ...(5) The DC voltages of and is guided to the FM demodulation output terminal O. In this low frequency amplifier 27, (4)
The difference between the X and Y signals shown in equation (5) is taken, and an FM-detected demodulated output is obtained from the output terminal O. That is, the demodulated output V ₀ at the demodulated output terminal O is
From equations (4) and (5), we can derive equation (6). However, the voltage gain of the low frequency amplifier 27 is assumed to be Av.

Here, by setting △φ=φ−π/2, equation (6) becomes equation (7).

The phase shift circuit 22 connected to the terminals U and V in FIG. 2 includes, for example, an inductor L ₁ shown in FIG.
A phase shift circuit, etc. consisting of a resistor R ₂ of a capacitor C _{2 and} a capacitor C ₂ is used. The deviation of the phase difference between the terminal voltages at the terminals U and V from π/2 corresponds to the above Δφ, and in this case, Δφ is expressed by equation (8).

△φ=±tan ^-1 2Q _L・△/c...(8) c...Center frequency in Fig. 3 △...Frequency deviation value from center frequency c Q _L ...Phase shift shown in Fig. 7 Load Q of the resonant circuit consisting of circuit inductor L ₂ and capacitor C ₂ Now, in equation (7), if we consider that △φ≪1, equation (7) becomes equation (9).

By substituting equation (8) into equation (9), equation (10) is obtained.

Also, considering the amplitude characteristics of the phase circuit (Fig. 7),
Equation (10) gives an approximation of equation (11).

However, x=2Q _L・Δ/c (12) Equation (11) shows the S-shaped characteristic of the FM demodulator, which is illustrated in FIG. 8. i.e. center frequency
When the frequency shifts by △ with c as the center, the DC level at the demodulation output terminal O is S as shown in Figure 8.
A letter-shaped curve is drawn, thus making FM demodulation possible.

Note that it is also possible to provide an amplitude limiting amplifier at each input of the OR circuits 23 and 24 to equalize the input amplitude levels of the OR circuits 23 and 24, but this configuration increases the overall gain and causes instability such as oscillation. This results in an increase in the number of constituent elements.

A specific embodiment of the FM demodulation circuit of the present invention is shown in FIG. Here, a specific embodiment of the present invention will be described using FIG. 9.

Terminals T, U, V, and O in FIG. 9 correspond to terminals T, U, V, and O in the principle diagram of the present invention (FIG. 2), respectively. Also, the terminal in Figure 9 is the FMIF amplifier 21.
The inverting input terminal of , terminal H′ is the power supply voltage supply terminal,
Terminal G′ indicates the ground terminal. transistor 31,
32, 33, 34 and resistors 35, 36, 37, 3
8 constitutes an FMIF amplifier 21, and transistor 3
The collector output of 2 is input to an OR circuit 24 composed of transistors 39, 40 and a resistor 43,
On the other hand, the collector output of the transistor 33 is input to an OR circuit 23 composed of transistors 41 and 42 and a resistor 44. Each OR circuit 23, 24
The collector output of the transistor 34 is connected to the base of the transistors 39 and 42 of the inductor 10.
1, 201, a capacitor 202, and a resistor 203. The output of each OR circuit 23, 24 is taken out from load resistors 43, 44, and resistor 4
5, 46 and the bases of transistors 48, 49.
Low-pass filter 2 composed of emitter-to-emitter capacitance
The signal is inputted via transistors 48, 49 and resistors 47, 50 to a low frequency amplifier 27 through transistors 48, 49 and resistors 47, 50, and a demodulated output is taken out from the collector of transistor 49 via output terminal O. Note that the capacitor 204 is for grounding the power supply voltage supply terminal H' in an alternating current manner.

In the embodiment of FIG. 9, transistors 48, 49
Capacitive impedance and resistance seen from the base of 4
5 and 46 constitute a low pass filter. Normally, a low-pass filter is one in which a resistor and a capacitor are connected in one or two stages, but as in this example, the low-pass filter is created by parasitic capacitive components between the base and emitter of a transistor or between the base and collector. By utilizing the filter effect, a low-pass filter suitable for semiconductor integrated circuits can be obtained.

The FM demodulation circuit according to the present invention is a completely new system that uses an OR circuit, whereas conventional examples (for example, quadrature detection) use a multiplication circuit. Similarly, each transistor 31, 32, 33, 3
In order for the bias of 4, 39, 40, 41, 42, 48, 49 to be applied normally, the power supply voltage supply terminal
A voltage of about 1.8V is sufficient for H', and it is possible to provide an FM demodulation circuit that operates at a low voltage and has extremely excellent performance.

Another advantage is that the number of parts used is small and the FM demodulation circuit can be constructed at low cost.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a conventional FM demodulator. Fig. 2 is a block diagram of an FM demodulator showing an embodiment of the present invention, and Figs. 3, 4, 5, 6, and 8 are diagrams showing the characteristics of each part of the embodiment of the present invention. The phase characteristics of the shift circuit, the voltage waveforms at points L, M, and N, the voltage waveform at point P, the voltage waveform at point Q, and input/output characteristics are shown, and FIG. 7 is a circuit diagram showing an example of the phase shift circuit. FIG. 9 is a circuit diagram showing a specific example of one embodiment of the present invention. 1, 2, 5, 6, 31, 32, 33, 34, 3
9,40,41,42,48,49...transistor, 3...constant current source, 9,10,11...diode, 4,7,8,35,36,37,38,
43, 44, 45, 46, 47, 50, 203...
...Resistance, 101,201...Inductor, 10
3,202,204... Capacitor.

Claims (1)

[Claims] 1: an FM intermediate frequency amplifier for amplifying an FM intermediate frequency signal, the output of which generates first and second signals having mutually opposite phases; a phase shift circuit that generates a phase shift signal by shifting the phase of the first signal by an amount corresponding to the deviation of the frequency of the signal with respect to a center FM intermediate frequency; a first OR circuit that generates an output that follows the dominant voltage among these, and a first OR circuit that receives the same signal as the second signal and the phase shift signal and generates an output that follows the dominant voltage among these; the second
an OR circuit, a first low-frequency circuit that integrates the output of the first OR circuit, a second low-frequency circuit that integrates the output of the second OR circuit; Take the difference in the output of the low frequency circuit of
An FM demodulation circuit comprising circuit means for generating an FM demodulation signal.