JPS64346U - - Google Patents
Info
- Publication number
- JPS64346U JPS64346U JP9347387U JP9347387U JPS64346U JP S64346 U JPS64346 U JP S64346U JP 9347387 U JP9347387 U JP 9347387U JP 9347387 U JP9347387 U JP 9347387U JP S64346 U JPS64346 U JP S64346U
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- semiconductor thin
- region
- conductivity type
- gate electrodes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 239000010408 film Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 description 1
Description
第１図はこの考案の一実施例に係る電界効果ト
ランジスタの構造を示す断面図、第２図Ａ乃至Ｅ
は第１図に示す電界効果トランジスタの製造工程
を示す断面図、第３図はこの考案の他の実施例に
係る電界効果トランジスタの構造を示す断面図、
第４図は従来の電界効果トランジスタの一構造例
を示す断面図である。
図の主要な部分を表わす符号の説明、２１……
半導体基板、２３……薄膜領域、２５，２９……
ゲート絶縁膜、２７，３１……ゲート電極、３３
……チヤネル領域、３５……ソース領域、３７…
…ドレイン領域。
FIG. 1 is a sectional view showing the structure of a field effect transistor according to an embodiment of the invention, and FIGS. 2A to E
is a sectional view showing the manufacturing process of the field effect transistor shown in FIG. 1, FIG. 3 is a sectional view showing the structure of a field effect transistor according to another embodiment of the invention,
FIG. 4 is a sectional view showing an example of the structure of a conventional field effect transistor. Explanation of symbols representing main parts of the figure, 21...
Semiconductor substrate, 23... Thin film region, 25, 29...
Gate insulating film, 27, 31... Gate electrode, 33
...Channel area, 35...Source area, 37...
...drain area.
Claims (1)
体基板と同一導電型の半導体薄膜領域と、 前記半導体薄膜領域の上下に各々ゲート絶縁膜
を介して同一幅で対向するように形成された２つ
のゲート電極と、 前記両ゲート電極にはさまれた前記半導体薄膜
領域に形成されるチヤネル領域の両側の前記半導
体薄膜領域に前記両ゲート電極と対向しないよう
に形成されたソース領域及びドレイン領域と、を
有することを特徴とする電界効果トランジスタ。[Claims for Utility Model Registration] Semiconductor thin film regions of the same conductivity type as the semiconductor substrate formed on a semiconductor substrate of a first conductivity type, and facing each other with the same width above and below the semiconductor thin film regions with gate insulating films interposed therebetween. two gate electrodes formed in such a manner that the channel region is formed in the semiconductor thin film region sandwiched between the two gate electrodes; A field effect transistor comprising a source region and a drain region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9347387U JPS64346U (en) | 1987-06-19 | 1987-06-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9347387U JPS64346U (en) | 1987-06-19 | 1987-06-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS64346U true JPS64346U (en) | 1989-01-05 |
Family
ID=30956082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9347387U Pending JPS64346U (en) | 1987-06-19 | 1987-06-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS64346U (en) |
-
1987
- 1987-06-19 JP JP9347387U patent/JPS64346U/ja active Pending