JPS6439559A - Probe card - Google Patents

Probe card

Info

Publication number
JPS6439559A
JPS6439559A JP62197471A JP19747187A JPS6439559A JP S6439559 A JPS6439559 A JP S6439559A JP 62197471 A JP62197471 A JP 62197471A JP 19747187 A JP19747187 A JP 19747187A JP S6439559 A JPS6439559 A JP S6439559A
Authority
JP
Japan
Prior art keywords
probes
chips
semiconductor
substrate
probe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62197471A
Other languages
Japanese (ja)
Inventor
Kazuhiro Nakajima
Toru Kume
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62197471A priority Critical patent/JPS6439559A/en
Publication of JPS6439559A publication Critical patent/JPS6439559A/en
Pending legal-status Critical Current

Links

Landscapes

  • Testing Of Individual Semiconductor Devices (AREA)
  • Measuring Leads Or Probes (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To test many semiconductor chips only by bringing probes into contact with the top surface of a semiconductor wafer once by providing the probes at prescribed positions so that the probes contact the pads of the semiconductor chips at the same time. CONSTITUTION:A probe 1 made of a conductive elastic material is provided on the main surface of each pad so as to probe the pads of all chips in the semiconductor wafer at a time. Two rows and two columns of probes 1 are arranged for each chip and the probes 1 are arranged in a matrix for all the chips and fixed by a substrate 4 made of a transparent substrate material so as to confirm probing positions. When all the chips in the semiconductor chip are measured at a time, a wiring layer 5 made of a transparent electrode which connects a tester to the probes 1 through a tester connection part 2 is provided on the substrate 4 so that input pins are processed in parallel and other pins are processed independently; and a compressed base-sealed layer 6 surrounded with a partition wall 7 made of a transparent material is provided on the wiring layer 5.
JP62197471A 1987-08-06 1987-08-06 Probe card Pending JPS6439559A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62197471A JPS6439559A (en) 1987-08-06 1987-08-06 Probe card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62197471A JPS6439559A (en) 1987-08-06 1987-08-06 Probe card

Publications (1)

Publication Number Publication Date
JPS6439559A true JPS6439559A (en) 1989-02-09

Family

ID=16375033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62197471A Pending JPS6439559A (en) 1987-08-06 1987-08-06 Probe card

Country Status (1)

Country Link
JP (1) JPS6439559A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4983908A (en) * 1989-10-11 1991-01-08 Mitsubishi Denki Kabushiki Kaisha Probing card for wafer testing and method of manufacturing the same
WO1998052218A1 (en) * 1997-05-09 1998-11-19 Hitachi, Ltd. Connector and probing system
JP2000200812A (en) * 1990-02-16 2000-07-18 Glenn J Leedy Fabrication and testing methods for integrated circuits using high density probe points.

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4983908A (en) * 1989-10-11 1991-01-08 Mitsubishi Denki Kabushiki Kaisha Probing card for wafer testing and method of manufacturing the same
US5042148A (en) * 1989-10-11 1991-08-27 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a probing card for wafer testing
JP2000200812A (en) * 1990-02-16 2000-07-18 Glenn J Leedy Fabrication and testing methods for integrated circuits using high density probe points.
WO1998052218A1 (en) * 1997-05-09 1998-11-19 Hitachi, Ltd. Connector and probing system

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