JPS644062A - Nonvolatile ram - Google Patents

Nonvolatile ram

Info

Publication number
JPS644062A
JPS644062A JP15896387A JP15896387A JPS644062A JP S644062 A JPS644062 A JP S644062A JP 15896387 A JP15896387 A JP 15896387A JP 15896387 A JP15896387 A JP 15896387A JP S644062 A JPS644062 A JP S644062A
Authority
JP
Japan
Prior art keywords
floating gate
electrons
high voltage
terminal
electron tunnel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15896387A
Other languages
Japanese (ja)
Inventor
Haruo Konishi
Chiharu Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments and Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments and Electronics Ltd filed Critical Seiko Instruments and Electronics Ltd
Priority to JP15896387A priority Critical patent/JPS644062A/en
Publication of JPS644062A publication Critical patent/JPS644062A/en
Pending legal-status Critical Current

Links

Landscapes

  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To perform a store operation without erasing electrons from a floating gate when the electrons are to be injected into the floating gate before/after the store operation, by coupling an electron tunnel terminal with a first high voltage terminal ERS through which electrons are erased from the floating gate and then connecting the electron tunnel terminal to a transistor. CONSTITUTION:In the case of a store operation in which information of an SRAM is transferred to an EEPROM, a high voltage VE is applied to a first high voltage terminal ERS 15 after a potential on a connection point Q5 is defined to be on an H or L level. When the state of the connection point Q5 is on an L level, a Fowler-Nordheim current flows from a floating gate 14 to an electron tunnel terminal 13, and the electrons are erased from the floating gate 14, so that the floating gate 4 is positively electrified. After electrons can be sufficiently erased from the floating gate 14, a high voltage VCG is applied to a second high voltage terminal CG16. When the state of the connection point Q5 is on an H level, the Fowler-Nordheim current flows from the electron tunnel terminal 13 to the floating gate 14, and the electrons are injected into the floating gate 14, so that the floating gate 14 is negatively electrified.
JP15896387A 1987-06-26 1987-06-26 Nonvolatile ram Pending JPS644062A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15896387A JPS644062A (en) 1987-06-26 1987-06-26 Nonvolatile ram

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15896387A JPS644062A (en) 1987-06-26 1987-06-26 Nonvolatile ram

Publications (1)

Publication Number Publication Date
JPS644062A true JPS644062A (en) 1989-01-09

Family

ID=15683187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15896387A Pending JPS644062A (en) 1987-06-26 1987-06-26 Nonvolatile ram

Country Status (1)

Country Link
JP (1) JPS644062A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011123987A (en) * 2009-12-09 2011-06-23 Samsung Electronics Co Ltd Nonvolatile logic circuit, integrated circuit including the same, and operating method of the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185296A (en) * 1984-03-02 1985-09-20 Fujitsu Ltd Non-volatile randum access memory device
JPS61113189A (en) * 1984-10-12 1986-05-31 Fujitsu Ltd Nonvolatile random access memory device
JPS61246995A (en) * 1985-04-24 1986-11-04 Fujitsu Ltd Nonvolatile random access memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60185296A (en) * 1984-03-02 1985-09-20 Fujitsu Ltd Non-volatile randum access memory device
JPS61113189A (en) * 1984-10-12 1986-05-31 Fujitsu Ltd Nonvolatile random access memory device
JPS61246995A (en) * 1985-04-24 1986-11-04 Fujitsu Ltd Nonvolatile random access memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011123987A (en) * 2009-12-09 2011-06-23 Samsung Electronics Co Ltd Nonvolatile logic circuit, integrated circuit including the same, and operating method of the same

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