JPS6447132A - Error correction method - Google Patents
Error correction methodInfo
- Publication number
- JPS6447132A JPS6447132A JP20436487A JP20436487A JPS6447132A JP S6447132 A JPS6447132 A JP S6447132A JP 20436487 A JP20436487 A JP 20436487A JP 20436487 A JP20436487 A JP 20436487A JP S6447132 A JPS6447132 A JP S6447132A
- Authority
- JP
- Japan
- Prior art keywords
- register
- series
- syndrome
- error correction
- error
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Error Detection And Correction (AREA)
Abstract
PURPOSE:To reduce the correction processing time by providing a syndrome register storing syndromes in row/column directions and correcting the syndrome of one series when the error symbol is corrected in the other series. CONSTITUTION:Data from an input terminal 20 is subject to error correction processing in the row direction (C1 series) by a C1 demodulator 11 and stored in a C1 syndrome register 13. Then the error correction processing in the column direction (C2 series) is implemented by a C2 demodulator 12 and the result is stored in a C2 syndrome register 14. In this case, the register 13 is updated by a C1 syndrome update circuit 21 in response to the symbol subject to error correction. When the error correction is applied in the C1 series, the register 14 is updated by a C2 syndrome update circuit 22. When the content of the register 13 is all '0' and if the content of the register 14 is all '0', the correction is finished. Thus, it is not required to read all the series data after the correction of the error symbol and the correction processing time is reduced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20436487A JPS6447132A (en) | 1987-08-18 | 1987-08-18 | Error correction method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20436487A JPS6447132A (en) | 1987-08-18 | 1987-08-18 | Error correction method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6447132A true JPS6447132A (en) | 1989-02-21 |
Family
ID=16489292
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20436487A Pending JPS6447132A (en) | 1987-08-18 | 1987-08-18 | Error correction method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6447132A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0821493A1 (en) * | 1996-07-23 | 1998-01-28 | STMicroelectronics S.A. | Error correction system in data frames comprising horizontal and vertical parity codes |
| WO2000045517A1 (en) * | 1999-01-26 | 2000-08-03 | Matsushita Electric Industrial Co., Ltd. | Data error correcting device |
| US6581178B1 (en) | 1999-02-15 | 2003-06-17 | Nec Corporation | Error correction coding/decoding method and apparatus |
-
1987
- 1987-08-18 JP JP20436487A patent/JPS6447132A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0821493A1 (en) * | 1996-07-23 | 1998-01-28 | STMicroelectronics S.A. | Error correction system in data frames comprising horizontal and vertical parity codes |
| FR2751810A1 (en) * | 1996-07-23 | 1998-01-30 | Sgs Thomson Microelectronics | ERROR CORRECTION SYSTEM IN DATA FRAMES HAVING HORIZONTAL AND VERTICAL PARITY CODES |
| US6032283A (en) * | 1996-07-23 | 2000-02-29 | Sgs-Thomson Microelectronics S.A. | System for correcting errors in data frames having horizontal and vertical parity codes |
| WO2000045517A1 (en) * | 1999-01-26 | 2000-08-03 | Matsushita Electric Industrial Co., Ltd. | Data error correcting device |
| US6611939B1 (en) | 1999-01-26 | 2003-08-26 | Matsushita Electrical Industrial Co., Ltd. | Iterative decoding of multiply-added error-correcting codes in a data processing error correction device |
| US6581178B1 (en) | 1999-02-15 | 2003-06-17 | Nec Corporation | Error correction coding/decoding method and apparatus |
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