JPS6448098A - X driver for matrix panel display - Google Patents

X driver for matrix panel display

Info

Publication number
JPS6448098A
JPS6448098A JP20448487A JP20448487A JPS6448098A JP S6448098 A JPS6448098 A JP S6448098A JP 20448487 A JP20448487 A JP 20448487A JP 20448487 A JP20448487 A JP 20448487A JP S6448098 A JPS6448098 A JP S6448098A
Authority
JP
Japan
Prior art keywords
video signal
capacitor
turned
clock
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20448487A
Other languages
Japanese (ja)
Inventor
Satoshi Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP20448487A priority Critical patent/JPS6448098A/en
Publication of JPS6448098A publication Critical patent/JPS6448098A/en
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)

Abstract

PURPOSE: To fix the offset voltage direction of a video signal and to prevent the video signal from being distorted by connecting a short circuit to a capacitor in a sampling and holding circuit for temporarily storing a video signal supplied from the external. CONSTITUTION: The H level of a data line 7 is successively shifted through shift registers 1 in accordance with a clock on a clock line 6, and when the output of the (N-1)th register 1 is turned to 'H', a video signal temporary storing capacitor 3 and a parallel connection short switch 12 in a sampling and holding circuit 13 corresponding to the N-th register are turned on. Thus, the potential of the capacitor 3 is turned to the same potential as that of a common line 14 and a video signal is held in the capacitor 3 by a succeeding clock through a video signal switch 2. Thereby, the offset voltage direction of the video signal is fixed and the video signal outputted through an amplifier 4 and an impedance conversion switch 5 is not distorted without being influenced by the potential of preceding scanning.
JP20448487A 1987-08-18 1987-08-18 X driver for matrix panel display Pending JPS6448098A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20448487A JPS6448098A (en) 1987-08-18 1987-08-18 X driver for matrix panel display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20448487A JPS6448098A (en) 1987-08-18 1987-08-18 X driver for matrix panel display

Publications (1)

Publication Number Publication Date
JPS6448098A true JPS6448098A (en) 1989-02-22

Family

ID=16491288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20448487A Pending JPS6448098A (en) 1987-08-18 1987-08-18 X driver for matrix panel display

Country Status (1)

Country Link
JP (1) JPS6448098A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02282723A (en) * 1989-04-24 1990-11-20 Hosiden Corp Active dot matrix display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02282723A (en) * 1989-04-24 1990-11-20 Hosiden Corp Active dot matrix display device

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