JPS6448125A - Normalization requesting circuit for floating-point arithmetic operation - Google Patents

Abstract

PURPOSE:To prevent determination of a ratio of normalizing operation to the number of times of arithmetic from causing the degradation in precision due to borrow and trade-off of the processing time by performing normalization at the time of the occurrence of borrow. CONSTITUTION:A mantissa part ALU 1, a register 2 where the arithmetic result is stored, and a shifter 3 for normalization are provided, and a borrow detecting circuit 4 detects borrow of four bits from the MSB wit respect to the arithmetic result obtained by floating-point arithmetic. If borrow of four or more bits is detected, the result is stored in a normalization request flag circuit 6. When detecting this normalization request flag, an ALU control circuit 5 generates a normalizing instruction by the interrupt operation and stores the normalized result in the register 2 and returns from interruption. Thus, the normalizing operation to be inserted to a series of repeatedly performed non-normalizing arithmetic operation is most suitably set.