JPS6449352A - Input turn-off detecting circuit - Google Patents
Input turn-off detecting circuitInfo
- Publication number
- JPS6449352A JPS6449352A JP20541987A JP20541987A JPS6449352A JP S6449352 A JPS6449352 A JP S6449352A JP 20541987 A JP20541987 A JP 20541987A JP 20541987 A JP20541987 A JP 20541987A JP S6449352 A JPS6449352 A JP S6449352A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- level
- terminal
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To correctly detect two input signals and the output turn-off of a CLK with a simple circuit constitution by providing a circuit reproducing means and an alarm signal generating means, which displays the abnormality of the input signal with the change of the signal on an output side when a prescribed time set beforehand or more passes and the change point of the input signal is detected. CONSTITUTION:When a signal P and a signal N are mutually inputted in a 'high' condition, these level conditions of output terminals Q and *Q, when a clock CLK is at the 'high' level, are inverted and outputted to the S terminal of RS-F.F circuits 21 and 22. For the RS-F.F terminals 21 and 22, when the S terminal is at the 'high' level and an R terminal is at the 'low' level, the output terminal Q goes to the 'high' level, and in a reverse case, the output terminal Q goes to the 'low' level. Thus, when the signal to be inputted to a monostable multi-vibrator circuit 20a is that of an RZ type with the change point like a signal 13', and it is not inputted in a prescribed time T, an alarm signal 6, which is an input cut-off signal, is generated. Thus, the cutoff of two input signal clocks can be detected with the simple circuit constitution and without fail.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20541987A JPS6449352A (en) | 1987-08-19 | 1987-08-19 | Input turn-off detecting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20541987A JPS6449352A (en) | 1987-08-19 | 1987-08-19 | Input turn-off detecting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6449352A true JPS6449352A (en) | 1989-02-23 |
Family
ID=16506537
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20541987A Pending JPS6449352A (en) | 1987-08-19 | 1987-08-19 | Input turn-off detecting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6449352A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59214360A (en) * | 1983-05-19 | 1984-12-04 | Fujitsu Ltd | Detecting circuit of signal input break |
-
1987
- 1987-08-19 JP JP20541987A patent/JPS6449352A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59214360A (en) * | 1983-05-19 | 1984-12-04 | Fujitsu Ltd | Detecting circuit of signal input break |
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