JPS6450138A - Arithmetic unit - Google Patents

Abstract

PURPOSE:To obtain an arithmetic unit which can utilize a large instruction memory, by connecting an output of a counter circuit, in addition to an address output of a calculation control part, to an address input of an instruction memory. CONSTITUTION:To an address output 21 and a write control signal output 23 of a calculation control part 1, at least two kinds of gate circuits 10, 11 are connected, and its outputs are connected to a counter circuit 3. When a control part 1 executes a write operation of an address which has been set in advance, a clock input terminal 32 or a clear terminal 31 of the circuit 3 can be driven thereby. On the other hand, to an address input 41 of an instruction memory 2, the address output 21 of the control part 1, and an output of the circuit 3 are connected first and secondly, respectively, and by the total of both the first and the second addresses, an instruction on the memory 2 is designated. Even when the number of bits of the address output 21 is small, the instruction memory having a large capacity as a whole can be used by increasing the number of bits of the output 35.