JPS645015A - Manufacture of integrated circuit element - Google Patents
Manufacture of integrated circuit elementInfo
- Publication number
- JPS645015A JPS645015A JP62160679A JP16067987A JPS645015A JP S645015 A JPS645015 A JP S645015A JP 62160679 A JP62160679 A JP 62160679A JP 16067987 A JP16067987 A JP 16067987A JP S645015 A JPS645015 A JP S645015A
- Authority
- JP
- Japan
- Prior art keywords
- gas
- film
- deposited
- thick
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
Abstract
PURPOSE:To facilitate manufacturing process, and reduce wiring resistance and contact resistance, by forming an amorphous tungsten nitride film as a barrier metal to isolate a semiconductor and a metal wiring, by applying a vapor phase reaction method of plasma excitation. CONSTITUTION:A memory cell part comprizes the following; a capacitor composed of a plate electrode 1 and a capacitor insulating film 2, a switching transistor composed of word lines 3a, 3b constituting a gate electrode, a source 4, and a drain 5, an insulating film 6 made of a boron phosphorus silicate glass (BPSG) film, and a contact hole 10 to connect the source 4 to an AlSi wiring constituting a bit line. By a plasma CVD equipment applying a gas in which tungusten hexafluoride gas, nitrogen gas and hydrogen gas are mixed with a ratio of 1:3:5, to material gas, a WVx thin film 20 of 800Angstrom thick is deposited, and next an Al thin film 21 of 8000Angstrom thick is deposited.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62160679A JPS645015A (en) | 1987-06-26 | 1987-06-26 | Manufacture of integrated circuit element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62160679A JPS645015A (en) | 1987-06-26 | 1987-06-26 | Manufacture of integrated circuit element |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS645015A true JPS645015A (en) | 1989-01-10 |
Family
ID=15720122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62160679A Pending JPS645015A (en) | 1987-06-26 | 1987-06-26 | Manufacture of integrated circuit element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS645015A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03255624A (en) * | 1990-03-05 | 1991-11-14 | Nec Corp | Manufacture of semiconductor device |
| US5487923A (en) * | 1991-07-16 | 1996-01-30 | Korea Institute Of Science And Technology | Method for depositing tungsten nitride thin films for formation of metal wirings of silicon semiconductor elements |
| EP0840363A1 (en) * | 1996-10-31 | 1998-05-06 | Texas Instruments Incorporated | Method for fabricating a conductive diffusion barrier layer by PECVD |
| WO1999000830A1 (en) * | 1997-06-30 | 1999-01-07 | Applied Materials, Inc. | Improved deposition of tungsten nitride using plasma pretreatment in a chemical vapor deposition chamber |
| US6162715A (en) * | 1997-06-30 | 2000-12-19 | Applied Materials, Inc. | Method of forming gate electrode connection structure by in situ chemical vapor deposition of tungsten and tungsten nitride |
| US6838376B2 (en) | 1997-11-05 | 2005-01-04 | Tokyo Electron Limited | Method of forming semiconductor wiring structures |
| US6861356B2 (en) | 1997-11-05 | 2005-03-01 | Tokyo Electron Limited | Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5742970A (en) * | 1980-07-23 | 1982-03-10 | Zellweger Uster Ag | Method apparatus for binding fiber bundle |
| JPS632319B2 (en) * | 1982-11-11 | 1988-01-18 | Kao Kk |
-
1987
- 1987-06-26 JP JP62160679A patent/JPS645015A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5742970A (en) * | 1980-07-23 | 1982-03-10 | Zellweger Uster Ag | Method apparatus for binding fiber bundle |
| JPS632319B2 (en) * | 1982-11-11 | 1988-01-18 | Kao Kk |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03255624A (en) * | 1990-03-05 | 1991-11-14 | Nec Corp | Manufacture of semiconductor device |
| US5487923A (en) * | 1991-07-16 | 1996-01-30 | Korea Institute Of Science And Technology | Method for depositing tungsten nitride thin films for formation of metal wirings of silicon semiconductor elements |
| EP0840363A1 (en) * | 1996-10-31 | 1998-05-06 | Texas Instruments Incorporated | Method for fabricating a conductive diffusion barrier layer by PECVD |
| WO1999000830A1 (en) * | 1997-06-30 | 1999-01-07 | Applied Materials, Inc. | Improved deposition of tungsten nitride using plasma pretreatment in a chemical vapor deposition chamber |
| US6162715A (en) * | 1997-06-30 | 2000-12-19 | Applied Materials, Inc. | Method of forming gate electrode connection structure by in situ chemical vapor deposition of tungsten and tungsten nitride |
| US6251190B1 (en) | 1997-06-30 | 2001-06-26 | Applied Materials, Inc. | Gate electrode connection structure by in situ chemical vapor deposition of tungsten and tungsten nitride |
| JP2002507327A (en) * | 1997-06-30 | 2002-03-05 | アプライド マテリアルズ インコーポレイテッド | Tungsten nitride deposition using plasma pretreatment in a chemical vapor deposition chamber |
| US6872429B1 (en) | 1997-06-30 | 2005-03-29 | Applied Materials, Inc. | Deposition of tungsten nitride using plasma pretreatment in a chemical vapor deposition chamber |
| US6838376B2 (en) | 1997-11-05 | 2005-01-04 | Tokyo Electron Limited | Method of forming semiconductor wiring structures |
| US6861356B2 (en) | 1997-11-05 | 2005-03-01 | Tokyo Electron Limited | Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film |
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