JPS6457493A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS6457493A
JPS6457493A JP62215914A JP21591487A JPS6457493A JP S6457493 A JPS6457493 A JP S6457493A JP 62215914 A JP62215914 A JP 62215914A JP 21591487 A JP21591487 A JP 21591487A JP S6457493 A JPS6457493 A JP S6457493A
Authority
JP
Japan
Prior art keywords
memory cell
reading
inverse
bit line
cell data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62215914A
Other languages
Japanese (ja)
Inventor
Hideto Hidaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62215914A priority Critical patent/JPS6457493A/en
Publication of JPS6457493A publication Critical patent/JPS6457493A/en
Pending legal-status Critical Current

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  • Dram (AREA)

Abstract

PURPOSE:To bring the deterioration of a reading voltage amplitude due to a noise to zero by maintaining a precharge state at the time reading memory cell data to a bit line having a memory cell. CONSTITUTION:The memory cell is connected at every other interval of the bit lines BL0, BL1, the inverse of BL1... intersecting with word lines WL0, WL1... and when the selected word line rises and the memory cell data is read to the bit line, reference bit lines the inverse of BL0, the inverse of BL1... mating with this bit line are maintained to the precharge state. Thereby, a capacity coupling noise between the bit lines at the time of reading the memory cell data can be brought to zero to prevent the deterioration of a reading voltage difference, enlarge a reading margin and improve a soft error rate or the like.
JP62215914A 1987-08-28 1987-08-28 Semiconductor memory device Pending JPS6457493A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62215914A JPS6457493A (en) 1987-08-28 1987-08-28 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62215914A JPS6457493A (en) 1987-08-28 1987-08-28 Semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS6457493A true JPS6457493A (en) 1989-03-03

Family

ID=16680343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62215914A Pending JPS6457493A (en) 1987-08-28 1987-08-28 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6457493A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0322290A (en) * 1989-03-06 1991-01-30 Matsushita Electric Ind Co Ltd Read circuit for dynamic ram
KR20000019073A (en) * 1998-09-08 2000-04-06 윤종용 Semiconductor memory device for improving crosstalk noise between adjacent bit lines
JP2002373491A (en) * 2001-06-15 2002-12-26 Fujitsu Ltd Semiconductor storage device
JP2007287209A (en) * 2006-04-13 2007-11-01 Matsushita Electric Ind Co Ltd Semiconductor memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0322290A (en) * 1989-03-06 1991-01-30 Matsushita Electric Ind Co Ltd Read circuit for dynamic ram
KR20000019073A (en) * 1998-09-08 2000-04-06 윤종용 Semiconductor memory device for improving crosstalk noise between adjacent bit lines
JP2002373491A (en) * 2001-06-15 2002-12-26 Fujitsu Ltd Semiconductor storage device
JP2007287209A (en) * 2006-04-13 2007-11-01 Matsushita Electric Ind Co Ltd Semiconductor memory device

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