JPS6457645A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain a multilayer interconnection wherein disconnection of wiring and cracks of interlayer film do not generate, by providing a film having tensile stress which is arranged along a first layer wiring and covers the peripheral part, and a film having compressive stress which is arranged on the first layer wiring and turns to an interlayer insulating film. CONSTITUTION:The title device is provided with the following; a first layer wiring 13 formed on a semiconductor substrate 11, a film 14 having tensile stress which is arranged along the first layer wiring and covers its peripheral part, and a film 15 having compressive stress which is arranged on the first wiring layer 13 and turns to an interlayer insulating film. The film 14 having tensile stress is deposited on the first layer wiring 13 formed on the semiconductor substrate 11, and the film 14 except the peripheral part of the first layer wiring 13 is eliminated. After the first interlayer insulating film 15 having compressive force is deposited on the first layer wiring 13, and flattening process using resin 16 is performed, a second interlayer insulating film 17 having compressive stress is deposited. For example, the above film 14 having tensile stress is a PSG film formed by reduced pressure-normal pressure CVD method, and the films 15, 17 having compressive stress are PSG films formed by plasma CVD method.