JPS6472638A - Pulse generating circuit - Google Patents

Pulse generating circuit

Info

Publication number
JPS6472638A
JPS6472638A JP22834587A JP22834587A JPS6472638A JP S6472638 A JPS6472638 A JP S6472638A JP 22834587 A JP22834587 A JP 22834587A JP 22834587 A JP22834587 A JP 22834587A JP S6472638 A JPS6472638 A JP S6472638A
Authority
JP
Japan
Prior art keywords
pulse
output
coincident
shift register
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22834587A
Other languages
Japanese (ja)
Inventor
Yoshitaka Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP22834587A priority Critical patent/JPS6472638A/en
Publication of JPS6472638A publication Critical patent/JPS6472638A/en
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To designate a head position of a signal to be replaced and a head position of a signal and the length of the signal by providing a flip-flop set by a coincident pulse from a coincidence detection circuit, reset by a coincident pulse outputted from a shift register and sending its output as a final output pulse. CONSTITUTION:A coincidence detection circuit 6 compares a counter output (c) with a data 'x' stored by a storage circuit 5 and outputs a coincident pulse (d) when they are coincident. A variable length shift register 9 receives a coincident pulse (d), shifts the pulse at every input of the clock (b) and outputs it. The shifted coincident pulse (d) is outputted as the output pulse (e) of a shift register. A flip-flop 10 is set by a coincident pulse (d) and reset by an output pulse (e) and its output is sent from an output terminal 11 as an output pulse (f) being the final output of a pulse generating circuit. Thus, the head position is designated based on the frame pulse and the length is designated to generate the pulse.
JP22834587A 1987-09-14 1987-09-14 Pulse generating circuit Pending JPS6472638A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22834587A JPS6472638A (en) 1987-09-14 1987-09-14 Pulse generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22834587A JPS6472638A (en) 1987-09-14 1987-09-14 Pulse generating circuit

Publications (1)

Publication Number Publication Date
JPS6472638A true JPS6472638A (en) 1989-03-17

Family

ID=16875008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22834587A Pending JPS6472638A (en) 1987-09-14 1987-09-14 Pulse generating circuit

Country Status (1)

Country Link
JP (1) JPS6472638A (en)

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