JPS647569A - Manufacture of semiconductor nonvolatile memory - Google Patents

Manufacture of semiconductor nonvolatile memory

Info

Publication number
JPS647569A
JPS647569A JP16374187A JP16374187A JPS647569A JP S647569 A JPS647569 A JP S647569A JP 16374187 A JP16374187 A JP 16374187A JP 16374187 A JP16374187 A JP 16374187A JP S647569 A JPS647569 A JP S647569A
Authority
JP
Japan
Prior art keywords
silicon layer
polycrystalline silicon
forming region
photoresist film
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16374187A
Other languages
Japanese (ja)
Other versions
JPH0783065B2 (en
Inventor
Yasuji Yamagata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP16374187A priority Critical patent/JPH0783065B2/en
Publication of JPS647569A publication Critical patent/JPS647569A/en
Publication of JPH0783065B2 publication Critical patent/JPH0783065B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To dispense with a photoresist film for ion implantation so as to simplify a process by a method wherein a drain source region is formed through ion implantaion in such a state that a first polycrystalline silicon layer is left unremoved on a drain forming region. CONSTITUTION:A field insulating film 2 used for the element separation is selectively provided on the primary face of a P-type silicon substrate 1 so as to divide an element forming region, of which surface a gate insulating film 3 is formed on. Next, a polycrystalline silicon layer is deposited on the whole surface and subjected to etching for forming a mask 4 selectively on a floating gate electrode and a drain forming region. Then, a silicon oxide film 5 is formed on the surface of the mask 4, a polycrystalline silicon layer 6 is deposited on the whole surface, and a photoresist film 7 with a gate electrode forming pattern is selectively formed on the polycrystalline silicon layer 6 of the element forming region. Moreover, the polycrystalline silicon layer 6 is etched through the photoresist film 7 used as a mask for the formation of a control gate electrode 8, and a deep and a shallow drain regions 9 and 10 are formed by impalanting N-type impurity ions using the photoresist film 7 and the field insulating film 2 as masks.
JP16374187A 1987-06-29 1987-06-29 Method for manufacturing semiconductor non-volatile memory Expired - Fee Related JPH0783065B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16374187A JPH0783065B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor non-volatile memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16374187A JPH0783065B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor non-volatile memory

Publications (2)

Publication Number Publication Date
JPS647569A true JPS647569A (en) 1989-01-11
JPH0783065B2 JPH0783065B2 (en) 1995-09-06

Family

ID=15779796

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16374187A Expired - Fee Related JPH0783065B2 (en) 1987-06-29 1987-06-29 Method for manufacturing semiconductor non-volatile memory

Country Status (1)

Country Link
JP (1) JPH0783065B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0223672A (en) * 1988-07-12 1990-01-25 Mitsubishi Electric Corp Semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0223672A (en) * 1988-07-12 1990-01-25 Mitsubishi Electric Corp Semiconductor memory device

Also Published As

Publication number Publication date
JPH0783065B2 (en) 1995-09-06

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees