JPS647571A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS647571A JPS647571A JP16375187A JP16375187A JPS647571A JP S647571 A JPS647571 A JP S647571A JP 16375187 A JP16375187 A JP 16375187A JP 16375187 A JP16375187 A JP 16375187A JP S647571 A JPS647571 A JP S647571A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- gate
- high melting
- metal layer
- gold plated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
- 239000002184 metal Substances 0.000 abstract 6
- 229910052751 metal Inorganic materials 0.000 abstract 6
- 238000002844 melting Methods 0.000 abstract 5
- 230000008018 melting Effects 0.000 abstract 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract 4
- 239000010931 gold Substances 0.000 abstract 4
- 229910052737 gold Inorganic materials 0.000 abstract 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 239000000758 substrate Substances 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000002513 implantation Methods 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE:To reduce a sray capacitace by a method wherein a high melting matal layer which is to be a Schottky is deposited on a GaAs substrate provided with an active layer on it, and a gold plated layer is selectively formed on a part of the high melting metal layer which is to be a gate, the disused part of the high melting metal layer is removed through the gold plated layer used as a mask for the formation of the gate. CONSTITUTION:A FET active layer 2 is formed on a semi-insulating GaAs substrate 1 through implantation of Si ions or the like and a high melting metal layer 3 which is to be a Schottky gate metal is formed. Next, a gold plated layer 4 is selectively formed on a region which is to be a gate through a photoresist 6 used as a mask so as to reduce a gate resistance, and the part of the high melting metal layer 3 other than a gate section is removed by etching through the gold plated layer 4 used as a mask. Further, a ohmic metal layer 5 is formed which is formed into a source and a drain electrode. By these processes, a stray capacitance can be made as small as possible, and thus excellent properties at high frequency can be realized.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16375187A JPS647571A (en) | 1987-06-29 | 1987-06-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16375187A JPS647571A (en) | 1987-06-29 | 1987-06-29 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS647571A true JPS647571A (en) | 1989-01-11 |
Family
ID=15780003
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16375187A Pending JPS647571A (en) | 1987-06-29 | 1987-06-29 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS647571A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0314289U (en) * | 1989-06-26 | 1991-02-13 | ||
| JP2016174067A (en) * | 2015-03-17 | 2016-09-29 | 豊田合成株式会社 | Semiconductor device, method for manufacturing the same, and power conversion device |
-
1987
- 1987-06-29 JP JP16375187A patent/JPS647571A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0314289U (en) * | 1989-06-26 | 1991-02-13 | ||
| JP2016174067A (en) * | 2015-03-17 | 2016-09-29 | 豊田合成株式会社 | Semiconductor device, method for manufacturing the same, and power conversion device |
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