JPS6476331A - Fetch trap controller - Google Patents

Fetch trap controller

Info

Publication number
JPS6476331A
JPS6476331A JP62235557A JP23555787A JPS6476331A JP S6476331 A JPS6476331 A JP S6476331A JP 62235557 A JP62235557 A JP 62235557A JP 23555787 A JP23555787 A JP 23555787A JP S6476331 A JPS6476331 A JP S6476331A
Authority
JP
Japan
Prior art keywords
trap
carried out
fetch
register
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62235557A
Other languages
Japanese (ja)
Inventor
Atsushi Tamao
Kenji Sakagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Fujitsu Integrated Microtechnology Ltd
Original Assignee
Fujitsu Ltd
Fujitsu Integrated Microtechnology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Fujitsu Integrated Microtechnology Ltd filed Critical Fujitsu Ltd
Priority to JP62235557A priority Critical patent/JPS6476331A/en
Publication of JPS6476331A publication Critical patent/JPS6476331A/en
Pending legal-status Critical Current

Links

Landscapes

  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To realize an effective fetch trap by deciding whether a store instruction is carried out or not a part where a load instruction is carried out and deciding the occurrence of a fault only in case no store instruction is carried out to start an interruption to a controller. CONSTITUTION:A fetch trap controller consists of an instruction address register 1, an interruption display register 4, a trap range designating register 5, and a data address/store position memory register 6. The register 5 stores the data which designates a trap range and the register 6 stores an address where data are stored and the bit position of this address. Then it is decided whether a store instruction is carried out or not for initialization at a part where a load instruction is carried out. Thus the occurrence of a fault is decided only when no store instruction is carried out. Then an interruption is started to a controller. Thus it is possible to perform a fetch trap for each process and also to discriminate a specific process undergone the fetch trap.
JP62235557A 1987-09-18 1987-09-18 Fetch trap controller Pending JPS6476331A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62235557A JPS6476331A (en) 1987-09-18 1987-09-18 Fetch trap controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62235557A JPS6476331A (en) 1987-09-18 1987-09-18 Fetch trap controller

Publications (1)

Publication Number Publication Date
JPS6476331A true JPS6476331A (en) 1989-03-22

Family

ID=16987748

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62235557A Pending JPS6476331A (en) 1987-09-18 1987-09-18 Fetch trap controller

Country Status (1)

Country Link
JP (1) JPS6476331A (en)

Similar Documents

Publication Publication Date Title
CA2098674A1 (en) Vector Processing Device
KR950020218A (en) Low power data processing device
EP0788054A3 (en) Memory controller and memory control system
WO1999046673A3 (en) Disturbance free update of data
CA2270122A1 (en) A gated store buffer for an advanced microprocessor
MY121544A (en) Execution of data processing instructions.
KR950009454A (en) Selective storage method and system of multi-execution device processing system state
JPS5779557A (en) Data processor
CA2056174A1 (en) Cache controller
KR950012207A (en) Microprocessor
DE69029005D1 (en) Initialization process after power supply failure and associated process system
JPS52119329A (en) Control of copier and the like
IE840430L (en) Computer control system
JPS6431238A (en) System for controlling store buffer
JPS6429933A (en) Store buffer controller for buffer storage system
JPS5617441A (en) Program interruption system
JPS5591034A (en) Fault detection system
JPS54121623A (en) Auxiliary bank switching system for main memory unit
JPS6474623A (en) Instruction control system
JPS6488756A (en) Memory device
JPS5587362A (en) Buffer memory control system
JPS57178547A (en) Instruction retrying control system
JPS6429934A (en) Program execution control system
JPS5587361A (en) Buffer memory control system
JPS6450141A (en) Information processor