JPS647718B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION An object of the present invention is to provide a capstan servo device that shortens the phase synchronization pull-in time when switching from still playback and slow motion playback to normal playback.

A noiseless magnetic recording/reproducing apparatus is known that performs slow motion playback by intermittently running a conventional magnetic tape, and performs still playback while stopping the intermittent running.

FIG. 1 is a block diagram showing the configuration of a cylinder servo device and a capstan servo device in a conventional magnetic recording/reproducing device. In FIG. 1, in the cylinder servo device, a rotary head 22 is driven by a cylinder motor 21, and the cylinder motor 21 is connected to a speed control circuit 1 to which the output of a speed detector 19 is input.
The speed is controlled by the speed control circuit 18, and the phase comparison output is superimposed on the speed control circuit 18 by the phase control circuit 17, which inputs the output g of the reference signal generator 16 and the output of the phase detector 20, and performs a phase comparison. , speed control and phase control.

On the other hand, in the capstan servo device, the magnetic tape 1 is transferred while being held between a pinch roller 2 and a capstan 4 driven by a capstan motor 3. Speed control is performed by a speed control circuit 11 to which the output of the speed detector 6 is input, and the output c of the control head 5 and the reference signal generator 16
The output g is inputted and the phase is compared by the phase control circuit 15.
The phase is controlled by being superimposed on the signal 1.

FIG. 2 is an operation waveform diagram for explaining the operation of the capstan servo device during intermittent running. 1st
In Figures 1 and 2, when slow motion playback is performed by intermittent running of the magnetic tape 1, the second
As shown in the figure, a slow motion command signal a is input to an intermittent travel command signal generator 9, and its output b
The capstan motor 3 is connected to the capstan motor 3 via the drive circuit 8.
starts booting. and control head 5
is the control signal c recorded on the magnetic tape 1
is detected, a signal d delayed for a certain period of time is generated by a delay circuit 14, and is inputted to a brake signal generator 13 to generate a brake command signal f. This braking command signal f is added to the speed error output j, which is the output of the speed control circuit 11, by the mixing circuit 10, and the capstan motor 3 starts braking by the output k via the drive circuit 8. and capstan motor 3
A stop detector 7 detects that the signal has stopped, and a signal e is formed via a shaping circuit 12.
The braking command signal f and the intermittent running command signal b are
, and enters a static playback state, that is, still playback. By repeating the above operations, a slow motion reproduced image can be obtained. In other words, this slow motion reproduction is a repetition of still reproduction by intermittent running, and if the intermittent running is interrupted and the vehicle is brought to a stop state, it becomes still reproduction.

The problem here is phase control of the capstan servo device during intermittent running. That is, the control signal c during intermittent running is random with respect to the phase of the reference signal g, and the timing at which the trapezoidal wave h of the phase control circuit 15 formed from the reference signal g is sampled and held is also random, and the phase error output i changes randomly as shown in Figure 2. Then, the speed error output j is modulated by the phase error output i as shown in Fig. 2, and the rotational speed of the capstan motor 3 becomes as shown in Fig. 2 v, which has the disadvantage that the magnetic tape 1 is not transported at a constant speed. Ta. As a result, noise was generated in the reproduced image, resulting in an unpleasant-looking screen.

In order to eliminate such conventional drawbacks, the present invention has the following features:
In particular, the phase control circuit 15 is characterized.

FIG. 3 is a block diagram of a phase control circuit showing an embodiment of the capstan servo device according to the present invention. FIG. 4 is an operational waveform diagram of the same embodiment.

Hereinafter, one embodiment of the present invention will be described based on the drawings. In FIGS. 3 and 4, the phase control circuit of the present invention is implemented as a digital circuit.

The timing pulse generating circuit 23 generates a pulse B by delaying the reference signal G by a certain period of time, and uses this pulse B to reset the m-bit binary counter 24. The m-bit binary counter 24 counts clock pulses A immediately after the reset is released (see waveform D shown in analog form). and,
Count value NL of m-bit binary counter 24 and
NH (NL=X・2 ⁿ , NH=(X+1)・2 ⁿ −1; x
is an arbitrary positive integer) are generated by the gate signal generation circuit 25, and when the count value D of the m-bit binary counter 24 is from 0 to NL, the n-stages are generated by the signals E and F. The output I of the gate group 27 is set to 0, and the count value D changes from NL to NH.
Until then, the n-stage gate groups 26 and 27 are opened, and the counted contents of the lower n bits of the m-bit binary counter 24 are output as they are as the output I of the n-stage gate group 27. When the count value D is greater than or equal to NH, the output I of the n-stage gate group 27 is set to a constant value of 2 ⁿ -1. As a result of the above, the output I of the n-stage gate group 27 is shaped into a trapezoidal wave as shown in FIG. Then, the output I is stored in the n-bit register 28 by the control signal c. Here, when the control signal c is at the center frequency and the phase is synchronized, the value J stored in the register 28 is 2 ⁿ -1. It is assumed that the period of clock pulse A is determined so that .
From the value J stored in the register 28, a pulse width modulation (hereinafter referred to as PWM) circuit 29 obtains a PWM output K as shown in FIG. Here, the PWM circuit 29 outputs a PWM with a duty cycle of 50% when the output J of the register 28 is 2 ^n-1 , and when the output J is 0, the PWM output K becomes "H", and the output J becomes "H". 2 When ^n-1 , PWM output K becomes "L",
It is assumed that the configuration is such that the duty cycle of the PWM output K varies linearly with respect to the output J of the register 28. On the other hand, pulse generator 3
0 generates a pulse signal L equivalent to a signal with a duty cycle of 50% of the PWM output K. In slow motion playback and still playback, the signal
SS is set to "H" to switch the output H of the switch circuit 31 to the pulse signal L. In this way, during slow motion playback and still playback,
Since the phase error output i superimposed on the speed control circuit 11 shown in FIG. 1 can be made constant, the speed error output j
This eliminates the need to modulate the phase control, making it possible to perform constant speed control using only speed control without phase control, and achieve stable intermittent running.

As explained above, according to the present invention, the phase error output of the phase control circuit is controlled at a duty cycle of about 50% during slow motion playback and still playback.
Since it can be fixed to PWM output, it has the advantage of realizing stable intermittent running only by speed control.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the configuration of the cylinder servo device and capstan servo device of a conventional magnetic recording/reproducing device, Fig. 2 is an operating waveform diagram of the capstan servo device during intermittent running, and Fig. 3 is the main FIG. 4 is a block diagram of a phase control circuit according to an embodiment of the invention, and FIG. 4 is an operational waveform diagram of the same phase control circuit. 1...magnetic tape, 2...pinch roller, 3...
...Capstan motor, 5...Control head, 6...Speed detector, 7...Stop detector, 8...
...Drive circuit, 9...Intermittent travel command signal generator, 1
0... Mixing circuit, 11... Speed control circuit, 13...
...Brake signal generator, 14...Delay circuit, 15...
Phase control circuit, 16...Reference signal generator, 23...
...Timing pulse generation circuit, 24...m-bit binary counter, 25...Gate signal generation circuit, 2
6, 27... n stage gate group, 28... n bit register, 29... PWM circuit, 30... pulse generator, 31... switching circuit.

Claims (1)

[Claims] 1 Phase control is performed by superimposing the pulse width modulation output of a digital phase control circuit that digitally compares the phase of a reference signal and a reproduction control signal on the output of a speed control circuit that controls the rotational speed of the capstan motor. In the capstan servo device, the digital phase control circuit reduces the duty cycle of the pulse width modulation output to approximately 50% when the reproduction control signal is at the center frequency and phase synchronization is applied. A set pulse width modulation means and a pulse generation means for generating a signal with a duty cycle of approximately 50% are provided, and the output of the pulse width modulation means is switched to the output of the pulse generation means during still playback and slow motion playback. A capstan servo device featuring: