JPS6482193A - Malfunction preventing circuit for memory card - Google Patents

Malfunction preventing circuit for memory card

Info

Publication number
JPS6482193A
JPS6482193A JP62239739A JP23973987A JPS6482193A JP S6482193 A JPS6482193 A JP S6482193A JP 62239739 A JP62239739 A JP 62239739A JP 23973987 A JP23973987 A JP 23973987A JP S6482193 A JPS6482193 A JP S6482193A
Authority
JP
Japan
Prior art keywords
memory card
buffer
input
malfunction
detachment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62239739A
Other languages
Japanese (ja)
Inventor
Keiichi Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62239739A priority Critical patent/JPS6482193A/en
Publication of JPS6482193A publication Critical patent/JPS6482193A/en
Pending legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To effectively prevent the destroy and the malfunction of a memory card by controlling with high impedance the output of an input buffer in the input signal indefinite period of the input buffer generated when the memory card is attachment/detachment-operated to and from a main body side connector. CONSTITUTION:For example, when a memory card 2 is pulled out of a main body 1, a microswitch SW transfers from an ON to an OFF, therefore, an enable control terminal 12 is cramped at low level and a try state buffer 4 does input a high output impedance condition. Thereafter, even when the contact of signal pins 10a and 11a with 10b and 11b is released and at the indefinite period, the buffer 4 is in the high output impedance and therefore, the output of the buffer 4 does not exceed a power source voltage from a memory part 3. Thus, the malfunction at the time of attachment and detachment can be prevented and the danger of the destroy of the memory part is eliminated.
JP62239739A 1987-09-24 1987-09-24 Malfunction preventing circuit for memory card Pending JPS6482193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62239739A JPS6482193A (en) 1987-09-24 1987-09-24 Malfunction preventing circuit for memory card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62239739A JPS6482193A (en) 1987-09-24 1987-09-24 Malfunction preventing circuit for memory card

Publications (1)

Publication Number Publication Date
JPS6482193A true JPS6482193A (en) 1989-03-28

Family

ID=17049212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62239739A Pending JPS6482193A (en) 1987-09-24 1987-09-24 Malfunction preventing circuit for memory card

Country Status (1)

Country Link
JP (1) JPS6482193A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01310421A (en) * 1988-06-08 1989-12-14 Fuji Electric Co Ltd Erroneous signal output preventing circuit
US5087215A (en) * 1990-03-08 1992-02-11 Leonid Simuni Ocean-going vessel and method for increasing the speed
JPH04205992A (en) * 1990-11-30 1992-07-28 Mitsubishi Electric Corp Input buffer circuit, input/output buffer circuit and portable type semiconductor memory device
US6980619B2 (en) 2002-04-12 2005-12-27 Battelle Energy Alliance, Llc Method for automatically scramming a nuclear reactor
JP2007223661A (en) * 2006-02-27 2007-09-06 Naikai Kigyo Kk Inner bag for flexible container, manufacturing method thereof and flexible container

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832526B2 (en) * 1975-04-02 1983-07-13 ソニー株式会社 surface wave converter
JPS62192814A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Connection structure of electronic circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5832526B2 (en) * 1975-04-02 1983-07-13 ソニー株式会社 surface wave converter
JPS62192814A (en) * 1986-02-20 1987-08-24 Mitsubishi Electric Corp Connection structure of electronic circuit board

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01310421A (en) * 1988-06-08 1989-12-14 Fuji Electric Co Ltd Erroneous signal output preventing circuit
US5087215A (en) * 1990-03-08 1992-02-11 Leonid Simuni Ocean-going vessel and method for increasing the speed
JPH04205992A (en) * 1990-11-30 1992-07-28 Mitsubishi Electric Corp Input buffer circuit, input/output buffer circuit and portable type semiconductor memory device
US6980619B2 (en) 2002-04-12 2005-12-27 Battelle Energy Alliance, Llc Method for automatically scramming a nuclear reactor
JP2007223661A (en) * 2006-02-27 2007-09-06 Naikai Kigyo Kk Inner bag for flexible container, manufacturing method thereof and flexible container

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