JPS6484745A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a lowering of resistance at pn junction of a gate electrode without depending on a process increased in its cost, by joining the pn junction surface of a polysilicon gate electrode by the use of a junction area which is larger than a sectional area, that is vertical in the wiring direction of the gate electrode. CONSTITUTION:At a semiconductor device where MOS transistors are integrated, polysilicon gate electrodes of p and n-types ch transistors are made up in one and the pn junction surface of the polysilicon gate electrodes is joined by the use of a junction area which is larger than a sectional area that is vertical in the wiring direction of a gate electrode. For example, an n-type 20 coming from the n-type ch transistor of CMOS type TFT and a p-type gate 21 coming from the p-type ch transistor are connected so as to form one electrode. And then the n-type and p-type gates 20 and 21 are formed so that a pn junction part 22 may have a stepped part that is parallel to the wiring direction of the gate electrode. When these are joined, the junction area of the pn junction part 22 becomes large as much as two gates have the junction areas at a stepped part each other.