JPS64875A - Character blurring prevention circuit in video circuit - Google Patents

Character blurring prevention circuit in video circuit

Info

Publication number
JPS64875A
JPS64875A JP62155787A JP15578787A JPS64875A JP S64875 A JPS64875 A JP S64875A JP 62155787 A JP62155787 A JP 62155787A JP 15578787 A JP15578787 A JP 15578787A JP S64875 A JPS64875 A JP S64875A
Authority
JP
Japan
Prior art keywords
circuit
signal swp
signal
swp
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62155787A
Other languages
Japanese (ja)
Other versions
JPH01875A (en
Inventor
Shinichiro Mano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Tec Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Priority to JP62-155787A priority Critical patent/JPH01875A/en
Priority claimed from JP62-155787A external-priority patent/JPH01875A/en
Publication of JPS64875A publication Critical patent/JPS64875A/en
Publication of JPH01875A publication Critical patent/JPH01875A/en
Pending legal-status Critical Current

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Landscapes

  • Television Signal Processing For Recording (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Abstract

PURPOSE: To prevent a character blurring in the video circuit of a still picture reproducing device, etc., by switching the vertical synchronization of a prescribed delay period and the vertical synchronization of a through signal state by a switching pulse from an OR circuit.
CONSTITUTION: A switching pulse signal SWP(Y) and a switching signal SWP(C) are outputted synchronously, but as for the signal SWP(Y), 4H from its fall is a LOW period (0.5H delay), and 9H is a high (through) period. Besides, the signal SWP(C) repeats a 0.5H delay and a through state at equal intervals. Then, a monostable circuit 12 to be set by the signal SWP(Y) is set longer than the 'L' period of 4H of the signal SWP(Y). Accordingly, when the OR of the output Q of the circuit 12 and the signal SWP(Y) is taken by an OR circuit 13, the switching pulse of the output comes to 'L' at the timing 13H after the signal SWP(Y), and comes to 'H' at the next rise-up of the signal SWP(Y). Accordingly, even if the noise is generated, the noise is never put into the vertical synchronizing signal.
COPYRIGHT: (C)1989,JPO&Japio
JP62-155787A 1987-06-23 Text blur prevention circuit in video circuit Pending JPH01875A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62-155787A JPH01875A (en) 1987-06-23 Text blur prevention circuit in video circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62-155787A JPH01875A (en) 1987-06-23 Text blur prevention circuit in video circuit

Publications (2)

Publication Number Publication Date
JPS64875A true JPS64875A (en) 1989-01-05
JPH01875A JPH01875A (en) 1989-01-05

Family

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