JPS648788A - Descramble control system - Google Patents

Descramble control system

Info

Publication number
JPS648788A
JPS648788A JP62164664A JP16466487A JPS648788A JP S648788 A JPS648788 A JP S648788A JP 62164664 A JP62164664 A JP 62164664A JP 16466487 A JP16466487 A JP 16466487A JP S648788 A JPS648788 A JP S648788A
Authority
JP
Japan
Prior art keywords
signal
section
timing
descramble
interception
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62164664A
Other languages
Japanese (ja)
Inventor
Kenji Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62164664A priority Critical patent/JPS648788A/en
Publication of JPS648788A publication Critical patent/JPS648788A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent undesired scramble release and interception by giving a control signal to release scrambling in a form of a pulse train signal. CONSTITUTION:A TV signal given from an input terminal 1 is subject to channel selection by a multi-channel tuner section 3 controlled by a CPU section 5 depending on channel information set by a key operation section 6 and control of descramble ON/OFF is applied by a descramble section 4 and the result is outputted from an output terminal 2. Through the constitution above, the descrambling is released only when the timing of the pulse train signal is coincident with the specified timing. Thus, the scramble cannot be released even when a prescribed voltage or a pulse signal not matching with the timing is provided to the control circuit for the purpose of interception.
JP62164664A 1987-07-01 1987-07-01 Descramble control system Pending JPS648788A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62164664A JPS648788A (en) 1987-07-01 1987-07-01 Descramble control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62164664A JPS648788A (en) 1987-07-01 1987-07-01 Descramble control system

Publications (1)

Publication Number Publication Date
JPS648788A true JPS648788A (en) 1989-01-12

Family

ID=15797471

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62164664A Pending JPS648788A (en) 1987-07-01 1987-07-01 Descramble control system

Country Status (1)

Country Link
JP (1) JPS648788A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04194372A (en) * 1990-11-28 1992-07-14 Natl Aerospace Lab Ion thruster

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04194372A (en) * 1990-11-28 1992-07-14 Natl Aerospace Lab Ion thruster

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