JPS6488991A - Ic memory with clearing circuit - Google Patents

Abstract

PURPOSE:To entirely clear the contents of a memory in an extremely short time by providing an address selecting means entirely scanning the row address of a memory cell array formed on an identical chip and a controlling means clearing for a column address selecting means with the aid of stopping the output of it. CONSTITUTION:A clearing signal from the outside can be inputted to the memory cell array 11. Besides, clearing input is inputted to a clearing control circuit 21 and an input data control circuit 12 is made to be a writing state by giving a clearing instruction to the circuit 12. Simultaneously to that, zero data is outputted and similarly the output of a row selection circuit 13 and a column selection circuit 14 is stopped. On the other hand, the address values from zero address to the biggest number address are respectively selected and outputted by driving a row counter 22 and a column counter 23 and the zero data writing area of the array 11 is specified through a row selection circuit 22 and a column selection circuit 25. Thus, the row counter and the column counter can be operated only by receiving the clearing input from the outside and a clearing circuit is accelerated.