JPS6489638A - Digital signal receiving circuit - Google Patents
Digital signal receiving circuitInfo
- Publication number
- JPS6489638A JPS6489638A JP62243553A JP24355387A JPS6489638A JP S6489638 A JPS6489638 A JP S6489638A JP 62243553 A JP62243553 A JP 62243553A JP 24355387 A JP24355387 A JP 24355387A JP S6489638 A JPS6489638 A JP S6489638A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- line
- clock
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013256 coordination polymer Substances 0.000 abstract 1
- 230000007257 malfunction Effects 0.000 abstract 1
Landscapes
- Communication Control (AREA)
Abstract
PURPOSE:To prevent the malfunction of a receiving side device to be cused by a noise signal, etc., by providing a circuit to remove the noise signal, etc., to be guided by a tag signal line with using the clock of a receiving side. CONSTITUTION:Now, when data are sent from a transmitting device 10 on a data bus line 14, a tag signal to show the data are effective is sent through a tag signal line 13 to a receiving device 20 side. Then, this tag signal is passed through a line receiver 20 and inputted to a logical product circuit 27 and a data terminal S of a shift register circuit 26. On the other hand, the clock of a period T and a duty 50% is outputted from a clock generating circuit 25 and inputted to a clock terminal CP of the circuit 26 and the tag signal is shifted and successively outputted to output lines K1 and K2. In such a case, when the noise signal of a width (t) (T>t) is loaded on an output line (a) of the receiver 21, since a signal is not outputted to an output line (c) of the circuit 27, the noise signal, whose width is shorter than the T, is removed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62243553A JPS6489638A (en) | 1987-09-30 | 1987-09-30 | Digital signal receiving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62243553A JPS6489638A (en) | 1987-09-30 | 1987-09-30 | Digital signal receiving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6489638A true JPS6489638A (en) | 1989-04-04 |
Family
ID=17105574
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62243553A Pending JPS6489638A (en) | 1987-09-30 | 1987-09-30 | Digital signal receiving circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6489638A (en) |
-
1987
- 1987-09-30 JP JP62243553A patent/JPS6489638A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ES2100114A1 (en) | Maximum search circuit | |
| HK1006887A1 (en) | A flash memory card with a ready/busy mask register and a ready/busy mode register | |
| US4686483A (en) | Digital filter circuit | |
| KR960025082A (en) | Data transmission device | |
| ES8507746A1 (en) | A data processing system including an infra-red coupled remote data entry device. | |
| JPS5531320A (en) | Package draw-out information system | |
| JPS5718128A (en) | Frequency dividing circuit | |
| JPS5696552A (en) | Erastic storage | |
| JPS5595155A (en) | Operation check system for counter | |
| JPS5572248A (en) | Function discrimination system for lsi | |
| EP0401960A3 (en) | Data processing apparatus with a slot for an additional board | |
| SE9501176L (en) | Device and method for synchronizing application specific integrated circuits (ASIC) | |
| JPS5630347A (en) | Single-speed digital subscriber's line transmission system | |
| JPS5497301A (en) | Signal transmission system | |
| JPS6459551A (en) | Input circuit | |
| JPS57194378A (en) | Test circuit of electronic clock | |
| JPS5715585A (en) | Sampling circuit for character multiplex broadcast signal | |
| SU902302A1 (en) | Digital information receiving device | |
| JPS57188158A (en) | Parity bit addition circuit | |
| JPS5538714A (en) | Data transmission system | |
| JPS6472638A (en) | Pulse generating circuit | |
| JPS56116150A (en) | Function display system for electronic type desk top calculator | |
| JPS5713543A (en) | Data speed transducer | |
| SU1185637A1 (en) | Digital information transmission device | |
| KR900013408A (en) | Received signal detection circuit of digital transmission system |