KR102000954B1 - 회로 모듈의 제조 방법 및 성막 장치 - Google Patents

회로 모듈의 제조 방법 및 성막 장치 Download PDF

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Publication number
KR102000954B1
KR102000954B1 KR1020170067434A KR20170067434A KR102000954B1 KR 102000954 B1 KR102000954 B1 KR 102000954B1 KR 1020170067434 A KR1020170067434 A KR 1020170067434A KR 20170067434 A KR20170067434 A KR 20170067434A KR 102000954 B1 KR102000954 B1 KR 102000954B1
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South Korea
Prior art keywords
circuit module
material layer
covering material
metal film
holder
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KR1020170067434A
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English (en)
Korean (ko)
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KR20180007662A (ko
Inventor
타다시 노무라
히데키 신카이
히데오 나카고시
마사히로 이노우에
Original Assignee
가부시키가이샤 무라타 세이사쿠쇼
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Publication of KR20180007662A publication Critical patent/KR20180007662A/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H01L23/485—
    • H01L21/2855—
    • H01L24/27—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors

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  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
KR1020170067434A 2016-07-13 2017-05-31 회로 모듈의 제조 방법 및 성막 장치 Active KR102000954B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2016-138634 2016-07-13
JP2016138634A JP2018010964A (ja) 2016-07-13 2016-07-13 回路モジュールの製造方法および成膜装置

Publications (2)

Publication Number Publication Date
KR20180007662A KR20180007662A (ko) 2018-01-23
KR102000954B1 true KR102000954B1 (ko) 2019-07-17

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ID=60995784

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KR1020170067434A Active KR102000954B1 (ko) 2016-07-13 2017-05-31 회로 모듈의 제조 방법 및 성막 장치

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JP (1) JP2018010964A (ja)
KR (1) KR102000954B1 (ja)
CN (1) CN207266393U (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018159590A1 (ja) 2017-02-28 2018-09-07 三菱マテリアル株式会社 銅／セラミックス接合体、絶縁回路基板、及び、銅／セラミックス接合体の製造方法、絶縁回路基板の製造方法
CN113195223A (zh) * 2018-12-20 2021-07-30 琳得科株式会社 端子保护用双面胶带及带电磁波屏蔽膜的半导体装置的制造方法
JP7447493B2 (ja) * 2020-01-07 2024-03-12 株式会社レゾナック 仮固定用の樹脂組成物と樹脂フィルム及び半導体装置の製造方法
US11434561B2 (en) * 2020-03-27 2022-09-06 STATS ChipPAC Pte. Ltd. Cooling device and process for cooling double-sided SiP devices during sputtering

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011151372A (ja) * 2009-12-25 2011-08-04 Murata Mfg Co Ltd 電子部品モジュールの製造方法及び電子部品モジュール
JP2012033636A (ja) * 2010-07-29 2012-02-16 Nitto Denko Corp 加熱剥離シート一体型半導体裏面用フィルム、半導体素子の回収方法、及び半導体装置の製造方法
KR101590593B1 (ko) * 2015-12-03 2016-02-02 제너셈(주) 반도체패키지의 스퍼터링 방법

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014041923A (ja) 2012-08-22 2014-03-06 Ps4 Luxco S A R L 半導体装置の製造方法及び製造装置
KR101704164B1 (ko) * 2014-09-23 2017-02-07 명지대학교 산학협력단 승강 부재, 이를 이용하는 전자파 차단 차폐막 형성 방법 및 그 장치

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011151372A (ja) * 2009-12-25 2011-08-04 Murata Mfg Co Ltd 電子部品モジュールの製造方法及び電子部品モジュール
JP2012033636A (ja) * 2010-07-29 2012-02-16 Nitto Denko Corp 加熱剥離シート一体型半導体裏面用フィルム、半導体素子の回収方法、及び半導体装置の製造方法
KR101590593B1 (ko) * 2015-12-03 2016-02-02 제너셈(주) 반도체패키지의 스퍼터링 방법

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JP2018010964A (ja) 2018-01-18
KR20180007662A (ko) 2018-01-23
CN207266393U (zh) 2018-04-20

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