KR870000766A - 협채널 폭을 갖는 절연게이트형 fet의 제조방법 - Google Patents

협채널 폭을 갖는 절연게이트형 fet의 제조방법

Info

Publication number
KR870000766A
KR870000766A KR1019860004250A KR860004250A KR870000766A KR 870000766 A KR870000766 A KR 870000766A KR 1019860004250 A KR1019860004250 A KR 1019860004250A KR 860004250 A KR860004250 A KR 860004250A KR 870000766 A KR870000766 A KR 870000766A
Authority
KR
South Korea
Prior art keywords
manufacturing
channel width
insulated gate
gate type
type fet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
KR1019860004250A
Other languages
English (en)
Other versions
KR900000072B1 (ko
Inventor
다께히데 시라또
다이지 에마
Original Assignee
후지쓰가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 후지쓰가부시끼가이샤 filed Critical 후지쓰가부시끼가이샤
Publication of KR870000766A publication Critical patent/KR870000766A/ko
Application granted granted Critical
Publication of KR900000072B1 publication Critical patent/KR900000072B1/ko
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213—Channel regions of field-effect devices
    • H10D62/221—Channel regions of field-effect devices of FETs
    • H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H10W10/0127—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers using both n-type and p-type impurities, e.g. for isolation of complementary doped regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/082—Ion implantation FETs/COMs
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/919—Compensation doping
KR1019860004250A 1985-06-19 1986-05-29 협채널 폭을 갖는 절연게이트형 fet의 제조방법 Expired KR900000072B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60-133831 1985-06-19
JP60133831A JPS61292358A (ja) 1985-06-19 1985-06-19 Mis型電界効果トランジスタの製造方法

Publications (2)

Publication Number Publication Date
KR870000766A true KR870000766A (ko) 1987-02-20
KR900000072B1 KR900000072B1 (ko) 1990-01-19

Family

ID=15114058

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019860004250A Expired KR900000072B1 (ko) 1985-06-19 1986-05-29 협채널 폭을 갖는 절연게이트형 fet의 제조방법

Country Status (5)

Country Link
US (1) US4737471A (ko)
EP (1) EP0208935B1 (ko)
JP (1) JPS61292358A (ko)
KR (1) KR900000072B1 (ko)
DE (1) DE3662628D1 (ko)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2706460B2 (ja) * 1988-03-14 1998-01-28 富士通株式会社 イオン注入方法
US4990974A (en) * 1989-03-02 1991-02-05 Thunderbird Technologies, Inc. Fermi threshold field effect transistor
US5138406A (en) * 1989-04-04 1992-08-11 Eaton Corporation Ion implantation masking method and devices
US5030579A (en) * 1989-04-04 1991-07-09 Eaton Corporation Method of making an FET by ion implantation through a partially opaque implant mask
EP0413982B1 (en) * 1989-07-27 1997-05-14 Junichi Nishizawa Impurity doping method with adsorbed diffusion source
EP0417456A3 (en) * 1989-08-11 1991-07-03 Seiko Instruments Inc. Method of producing semiconductor device
JP2906260B2 (ja) * 1989-12-01 1999-06-14 セイコーインスツルメンツ株式会社 Pn接合素子の製造方法
CA2031254A1 (en) * 1989-12-01 1991-06-02 Kenji Aoki Doping method of barrier region in semiconductor device
CA2031253A1 (en) * 1989-12-01 1991-06-02 Kenji Aoki Method of producing bipolar transistor
JP2920546B2 (ja) * 1989-12-06 1999-07-19 セイコーインスツルメンツ株式会社 同極ゲートmisトランジスタの製造方法
US5366922A (en) * 1989-12-06 1994-11-22 Seiko Instruments Inc. Method for producing CMOS transistor
US5242848A (en) * 1990-01-22 1993-09-07 Silicon Storage Technology, Inc. Self-aligned method of making a split gate single transistor non-volatile electrically alterable semiconductor memory device
US5572054A (en) * 1990-01-22 1996-11-05 Silicon Storage Technology, Inc. Method of operating a single transistor non-volatile electrically alterable semiconductor memory device
JPH04107831A (ja) * 1990-08-27 1992-04-09 Sharp Corp 半導体装置の製造方法
US5064775A (en) * 1990-09-04 1991-11-12 Industrial Technology Research Institute Method of fabricating an improved polycrystalline silicon thin film transistor
JP2881267B2 (ja) * 1991-01-11 1999-04-12 株式会社半導体エネルギー研究所 半導体装置およびその作製方法
US5440160A (en) * 1992-01-28 1995-08-08 Thunderbird Technologies, Inc. High saturation current, low leakage current fermi threshold field effect transistor
US5369295A (en) * 1992-01-28 1994-11-29 Thunderbird Technologies, Inc. Fermi threshold field effect transistor with reduced gate and diffusion capacitance
US5525822A (en) * 1991-01-28 1996-06-11 Thunderbird Technologies, Inc. Fermi threshold field effect transistor including doping gradient regions
EP0505877A2 (en) * 1991-03-27 1992-09-30 Seiko Instruments Inc. Impurity doping method with adsorbed diffusion source
US5786620A (en) * 1992-01-28 1998-07-28 Thunderbird Technologies, Inc. Fermi-threshold field effect transistors including source/drain pocket implants and methods of fabricating same
US5543654A (en) * 1992-01-28 1996-08-06 Thunderbird Technologies, Inc. Contoured-tub fermi-threshold field effect transistor and method of forming same
US5814869A (en) * 1992-01-28 1998-09-29 Thunderbird Technologies, Inc. Short channel fermi-threshold field effect transistors
US5648288A (en) * 1992-03-20 1997-07-15 Siliconix Incorporated Threshold adjustment in field effect semiconductor devices
US5753530A (en) * 1992-04-21 1998-05-19 Seiko Instruments, Inc. Impurity doping method with diffusion source of boron-silicide film
JP3181695B2 (ja) * 1992-07-08 2001-07-03 ローム株式会社 Soi基板を用いた半導体装置の製造方法
JP3516307B2 (ja) * 1992-12-24 2004-04-05 ヒュンダイ エレクトロニクス アメリカ デジタルトランジスタで構成される差動アナログトランジスタ
US6683350B1 (en) * 1993-02-05 2004-01-27 Semiconductor Energy Laboratory Co., Ltd. Transistor and method for manufacturing the same
JP3318384B2 (ja) * 1993-02-05 2002-08-26 株式会社半導体エネルギー研究所 薄膜トランジスタ及びその作製方法
EP0637074A3 (en) 1993-07-30 1995-06-21 Sgs Thomson Microelectronics Process for the production of active and isolated areas by split imaging.
US5610429A (en) * 1994-05-06 1997-03-11 At&T Global Information Solutions Company Differential analog transistors constructed from digital transistors
JPH07335883A (ja) * 1994-06-15 1995-12-22 Toshiba Corp 半導体装置の製造方法
KR100233558B1 (ko) * 1996-06-29 1999-12-01 김영환 반도체 소자의 제조방법
US6417550B1 (en) * 1996-08-30 2002-07-09 Altera Corporation High voltage MOS devices with high gated-diode breakdown voltage and punch-through voltage
EP0902483B1 (en) * 1997-09-11 2008-11-12 Telefonaktiebolaget LM Ericsson (publ) Electrical device comprising a voltage dependant capacitance and method of manufacturing the same
SE515783C2 (sv) * 1997-09-11 2001-10-08 Ericsson Telefon Ab L M Elektriska anordningar jämte förfarande för deras tillverkning
US6432777B1 (en) 2001-06-06 2002-08-13 International Business Machines Corporation Method for increasing the effective well doping in a MOSFET as the gate length decreases
KR102125570B1 (ko) * 2013-12-30 2020-06-23 에스케이하이닉스 주식회사 데이터 전송 회로

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2640694A1 (de) * 1976-09-10 1978-03-16 Licentia Gmbh Verfahren zum herstellen einer integrierten schaltungsanordnung
US4108686A (en) * 1977-07-22 1978-08-22 Rca Corp. Method of making an insulated gate field effect transistor by implanted double counterdoping
JPS577153A (en) * 1980-06-16 1982-01-14 Nec Corp Preparation of semiconductor device
GB2123605A (en) * 1982-06-22 1984-02-01 Standard Microsyst Smc MOS integrated circuit structure and method for its fabrication
DE3314450A1 (de) * 1983-04-21 1984-10-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen
DE3340560A1 (de) * 1983-11-09 1985-05-15 Siemens AG, 1000 Berlin und 8000 München Verfahren zum gleichzeitigen herstellen von schnellen kurzkanal- und spannungsfesten mos-transistoren in vlsi-schaltungen
JPS60106142A (ja) * 1983-11-15 1985-06-11 Nec Corp 半導体素子の製造方法
US4535532A (en) * 1984-04-09 1985-08-20 At&T Bell Laboratories Integrated circuit contact technique
US4569117A (en) * 1984-05-09 1986-02-11 Texas Instruments Incorporated Method of making integrated circuit with reduced narrow-width effect
US4590665A (en) * 1984-12-10 1986-05-27 Solid State Scientific, Inc. Method for double doping sources and drains in an EPROM

Also Published As

Publication number Publication date
EP0208935A1 (en) 1987-01-21
DE3662628D1 (de) 1989-05-03
US4737471A (en) 1988-04-12
KR900000072B1 (ko) 1990-01-19
EP0208935B1 (en) 1989-03-29
JPH0345903B2 (ko) 1991-07-12
JPS61292358A (ja) 1986-12-23

Similar Documents

Publication Publication Date Title
DE3662628D1 (de) Narrow channel width fet
DE3569634D1 (en) Method of fabricating an insulated gate type field-effect transistor
EP0190925A3 (en) A driving circuit for an insulated gate bipolar transistor
KR880701964A (ko) 전계효과 트랜지스터용 t- 게이트 전극 및 이의 제조방법
NO166748C (no) Drivkrets for drift av en koblingsanordning med en felteffekttransistor.
EP0128751A3 (en) Manufacturing method of schottky gate fet
EP0211353A3 (en) Method for the manufacture of a field effect transistor
DE3569313D1 (en) Method of manufacturing gaas field effect transistor
KR850008057A (ko) Misfet로 구성되는 반도체 장치의 제조방법
FR2576711B1 (fr) Transistor a effet de champ a heterojonction
KR890015363A (ko) 절연 게이트 mosfet의 제조방법
EP0255970A3 (en) A method of manufacturing an insulated gate field effect transistor
GB2172745B (en) Method of manufacturing thin film transistor
EP0228107A3 (en) Fast switching lateral insulated gate transistors
EP0184047A3 (en) Field-effect transistor with self-aligned gate and method for its manufacture
GB2162999B (en) Manufacturing insulated gate field effect transistors
DE3369030D1 (en) Method of making a monolithic integrated circuit comprising at least one insulated gate field-effect transistor
EP0149033A3 (en) Field-effect transistor with insulated gate electrode
EP0478004A3 (en) Insulated gate transistor operable at a low drain-source voltage
KR860004455A (ko) 박막트랜지스터의 제조방법
FR2589648B1 (fr) Circuit amplificateur a transistor a effet de champ
KR870700592A (ko) 치환벤즈 알데히드의 제조방법
KR870004953A (ko) 시클로알칸올의 제조방법
EP0311109A3 (en) Method of manufacturing a field-effect transistor having a junction gate
KR870700632A (ko) 네틸마이신의 제조방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

G160 Decision to publish patent application
PG1605 Publication of application before grant of patent

St.27 status event code: A-2-2-Q10-Q13-nap-PG1605

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R13-asn-PN2301

St.27 status event code: A-5-5-R10-R11-asn-PN2301

FPAY Annual fee payment

Payment date: 20010111

Year of fee payment: 12

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 12

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20020120

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20020120

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000