KR970077482A - Semiconductor device isolation oxide film manufacturing method - Google Patents

Semiconductor device isolation oxide film manufacturing method Download PDF

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KR970077482A
KR970077482A KR1019960015076A KR19960015076A KR970077482A KR 970077482 A KR970077482 A KR 970077482A KR 1019960015076 A KR1019960015076 A KR 1019960015076A KR 19960015076 A KR19960015076 A KR 19960015076A KR 970077482 A KR970077482 A KR 970077482A
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film
insulating
etching
insulating film
layer
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KR0179290B1 (en
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이상돈
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문정환
Lg 반도체 주식회사
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0121—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] in regions recessed from the surface, e.g. in trenches or grooves
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials

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  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

본 발명은 반도체 소자 제조방법에 관하 것으로, 특지 256M Bit 이상의 제품에 적용될 수 있도록 좁은 필드영역에 계단식 구조의 격리 산화막을 성장시킨 반도체 소자 격의 산화막 제조에 관한 것이다.The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method for manufacturing an oxide film having a stepped structure in which an isolated oxide film of a stepped structure is grown in a narrow field region so as to be applicable to a product having a specific product of 256 Mbits or more.

이를 위한 본 발명의 반도체 소자 격리 산화막 제조방법은 기판 상에 제1, 제2절연막과 제1전극층 그리고, 제3절연막을 차례대로 증착하는 단계, 상기 제2절연막 위의 제3절연막 및 제1전극층을 소정 영역 식각하는 단계, 상기 전면에 제4절연막 증착 후 제1전극층과 제3절연막 측벽에 측벽 절연막 형성하는 단계, 상기 들어난 제2절연막과 들어난 제2절연막의 밑의 기판을 소정 영역까지 식각하는 단계, 상기 측벽 절연막과 제3절연막의 상부를 소정 영역까지 식각하는단계, 상기 들어난 기판상에 필드 절연막 형성하는 단계를 포함하는 것을 특정으로 한다.A method for fabricating a semiconductor device isolation oxide film according to the present invention includes the steps of sequentially depositing first and second insulating films, a first electrode layer, and a third insulating film on a substrate, sequentially depositing a third insulating film and a first electrode layer Forming a sidewall insulation film on the sidewalls of the first electrode layer and the third insulation film after depositing the fourth insulation film on the front surface; forming a sidewall insulation film on the sidewall of the first electrode layer and the third insulation film, Etching the upper surface of the sidewall insulating film and the third insulating film to a predetermined region, and forming a field insulating film on the embedded substrate.

Description

반도체 소자 격리 산화막 제조방법Semiconductor device isolation oxide film manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is a trivial issue, I did not include the contents of the text.

제2도는 본 발명 제1실시예의 반도체 소자 격리 산화막 공정 단면도.FIG. 2 is a sectional view of the semiconductor element isolation oxide film process of the first embodiment of the present invention. FIG.

Claims (12)

기판 상에 제1, 제2절연막과 제1전극층 그리고, 제3절연막을 차례대로 증착하는 단계; 상기 제2절연막 위의 제3절연막 및 제1전극층을 소정 영역 식각하는 단계; 상기 전면에 제4절연막 증착 후 제1전국층과 제3절연막 측벽에 절연막 형성하는 단계;상기 들어난 제2절연막과 들어난 제2절연막 밑의 기판을 소정 영역까지 식각하는 단계; 상기 측벽 절연막과 제3절연막의 상부를 소정 영역까지 식각하는 단계; 상기 들어난 기판상에 필드 절연막 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자 격리 산화막 제조방법.Sequentially depositing first and second insulating films, a first electrode layer, and a third insulating film on a substrate; Etching the third insulating layer and the first electrode layer on the second insulating layer in a predetermined region; Forming a first insulating layer on the first insulating layer and a side wall of the third insulating layer after the fourth insulating layer is deposited on the front surface; etching the substrate under the second insulating layer and the embedded second insulating layer to a predetermined region; Etching the upper portions of the sidewall insulating film and the third insulating film to a predetermined region; And forming a field insulating film on the substrate on which the semiconductor element isolation oxide film is formed. 제1항에 있어서, 상기 제3절연막 및 제1전극층 식각 후 제1전극층 측면에 열절연막을 성장시키는 것을 특징으로 하는 반도체 소자 격리 산화막 제조방법.The method according to claim 1, wherein a thermal insulating film is grown on the side surfaces of the first electrode layer after the third insulating film and the first electrode layer are etched. 제1항에 있어서, 상기 제1전극층을 얇은 절연막으로 대체하여 사용할 수 있는 것을 특징으로 하는 반도체 소자 격리 산화막 제조방법The method for manufacturing a semiconductor device isolation oxide film according to claim 1, wherein the first electrode layer is replaced with a thin insulating film 제1항에 있어서, 상기 측벽 절연막 형성시 전극층을 사용하여 측벽 절연막을 형성할 수 있는 것을 특징으로 하는 반도체 소자 격리 산화막 제조방법.The method for manufacturing a semiconductor device isolation oxide film according to claim 1, wherein a sidewall insulating film can be formed using an electrode layer when forming the sidewall insulating film. 기판에 제1절연막과 제1절연막을 차례로 형성하는 단계; 제1절연막 위의 소정 부분이 노출되도록 제2절연막 식각하는 단계; 상기 전면에 제3절연막 증착 후 제3절연막을 식각하여 제2절연막 측벽에 측벽 절연막을 형성하는 단계; 상기 제2절연막과 측벽 절연막 식각하는 단계; 상기 들어난 제1절연막과 그 아래 기판의 소정 영역까지 식각하는 단계; 상기 노출된 기판 상에 필드 절연막 형성하는 것을 특징으로 하는 반도체 소자 격리 산화막 제도방법.Sequentially forming a first insulating film and a first insulating film on a substrate; Etching the second insulating layer to expose a predetermined portion of the first insulating layer; Forming a sidewall insulation film on the sidewall of the second insulation film by etching the third insulation film after depositing the third insulation film on the front surface; Etching the second insulating film and the sidewall insulating film; Etching the first insulating film and the underlying substrate to a predetermined region; And forming a field insulating film on the exposed substrate. 제5항에 있어서, 상기 측벽 절연막 형성시 전극층을 사용하여 측벽 절연막을 형성할 수 있는 것을 특징으로 하는 반도체 소자 격리 산화막 제조방법.The method for manufacturing a semiconductor device isolation oxide film according to claim 5, wherein a sidewall insulation film can be formed using an electrode layer when forming the sidewall insulation film. 기판 상에 제1절연막, 제2절연막, 제1전극층, 제3절연막을 차례로 증착하는 단계; 상기 제2절연막 소정영역에 노출되도록 제3절연막과 제1전극층을 식각하는 단계; 상기 제3절연막 완전 제거시까지 제2절연막 같이 식각하는 단계; 상기 전면에 제4절연막 증착 후 제2절연막과 제1전극층 측벽에 측벽 절연막을 형성하는 단계; 상기 노출된 제2절연막과 측벽 절연막을 식각하는 단계; 상기 들어난 제1절연막 식각 후 노출된 기판을 소정영역까지 식각하는 단계; 노출된 기판 상에 필드 산화막을 형성하는 것을 포함하여 제작되는 것을 특징으로 하는 반도체 소자 격리 산화막 제조 방법.Sequentially depositing a first insulating film, a second insulating film, a first electrode layer, and a third insulating film on a substrate; Etching the third insulating layer and the first electrode layer to expose the predetermined region of the second insulating layer; Etching the second insulating film until the third insulating film is completely removed; Forming a sidewall insulation film on the sidewalls of the first insulation layer and the second insulation layer after depositing a fourth insulation layer on the front surface; Etching the exposed second insulating film and the sidewall insulating film; Etching the exposed substrate to a predetermined region after the first insulating film is etched; Forming a field oxide film on the exposed substrate; and forming a field oxide film on the exposed substrate. 제7항에 있어서, 상기 제1전극층 형성을 절연막으로 대체할 수 있는 것을 포함하여 이루어짐을 특징으로 하는 반도체 소자 격리 산화막 제조 방법.8. The method according to claim 7, wherein the first electrode layer formation can be replaced with an insulating layer. 제7항에 있어서, 상기 제3절연막이 완전히 제거될 때까지 제2절연막을 같이 식각한 후, 제1전극층을 식각하고 측벽 산화막을 형성하는 것을 포함하여 이루어짐을 특징으로 하는 반도체 소자 격리 산화막 제조 방법.8. The method of claim 7, further comprising etching the second insulating layer until the third insulating layer is completely removed, and then etching the first electrode layer to form a sidewall oxide layer . 제7항에 있어서, 상기 측벽 절연막 형성시 전극층을 사용하여 측벽 산화막을 형성하는 것을 포함하여 이루어짐을 특징으로 하는 반도체 소자 격리 산화막 제조 방법.8. The method of claim 7, wherein the side wall oxide film is formed using an electrode layer when the side wall insulating film is formed. 제7항에 있어서, 9항과 같이 제1전극층을 식각하고 어떤 다른 박막의 증착없이 제2절연막을 식각하는 단계를 포함하여 이루어짐을 특징으로 하는 반도체 소자 격리 산화막 제조방법.8. The method of claim 7, further comprising etching the first electrode layer and etching the second insulating layer without depositing any other thin film as in claim 9. 제7항에 있어서, 상기 제1절연막 식각 전에 제1전극층을 식각하지 않고 제1절연막의 식각후 기판의 식각시 제1전극층이 함께 식각되도록 하는 단계; 상기 기판의 식각량을 제1전극층의 두께에 따라 조절할 수 있는 공정을 포함하여 이루어지을 특징으로 하는 반도체 소자 격리 산화막 제조 방법.8. The method of claim 7, further comprising: etching the first insulating layer without etching the first insulating layer, and etching the first electrode layer when the substrate is etched after the first insulating layer is etched; And a step of adjusting an etching amount of the substrate according to a thickness of the first electrode layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: It is disclosed by the contents of the first application.
KR1019960015076A 1996-05-08 1996-05-08 Semiconductor device isolation oxide film manufacturing method Expired - Fee Related KR0179290B1 (en)

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