MY6900297A - Process for etching semiconductors in the fabrication of miniature semiconductor networks comprising a single semiconductor block - Google Patents

Process for etching semiconductors in the fabrication of miniature semiconductor networks comprising a single semiconductor block

Info

Publication number
MY6900297A
MY6900297A MY1969297A MY6900297A MY6900297A MY 6900297 A MY6900297 A MY 6900297A MY 1969297 A MY1969297 A MY 1969297A MY 6900297 A MY6900297 A MY 6900297A MY 6900297 A MY6900297 A MY 6900297A
Authority
MY
Malaysia
Prior art keywords
fabrication
networks
semiconductor
miniature
block
Prior art date
Application number
MY1969297A
Other languages
English (en)
Original Assignee
Texas Instruments Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Incorporated filed Critical Texas Instruments Incorporated
Publication of MY6900297A publication Critical patent/MY6900297A/xx

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/61—Electrolytic etching
    • H10P50/613—Electrolytic etching of Group IV materials
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25F—PROCESSES FOR THE ELECTROLYTIC REMOVAL OF MATERIALS FROM OBJECTS; APPARATUS THEREFOR
    • C25F3/00—Electrolytic etching or polishing
    • C25F3/02—Etching
    • C25F3/12—Etching of semiconducting materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Weting (AREA)
MY1969297A 1959-05-06 1969-12-31 Process for etching semiconductors in the fabrication of miniature semiconductor networks comprising a single semiconductor block MY6900297A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81129659A 1959-05-06 1959-05-06

Publications (1)

Publication Number Publication Date
MY6900297A true MY6900297A (en) 1969-12-31

Family

ID=25206147

Family Applications (1)

Application Number Title Priority Date Filing Date
MY1969297A MY6900297A (en) 1959-05-06 1969-12-31 Process for etching semiconductors in the fabrication of miniature semiconductor networks comprising a single semiconductor block

Country Status (3)

Country Link
GB (1) GB945735A (da)
LU (1) LU38604A1 (da)
MY (1) MY6900297A (da)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4096619A (en) * 1977-01-31 1978-06-27 International Telephone & Telegraph Corporation Semiconductor scribing method

Also Published As

Publication number Publication date
LU38604A1 (da) 1960-07-05
GB945735A (en) 1964-01-08

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