NO174406C - System for å sikre dataintegritet - Google Patents

System for å sikre dataintegritet

Info

Publication number
NO174406C
NO174406C NO861863A NO861863A NO174406C NO 174406 C NO174406 C NO 174406C NO 861863 A NO861863 A NO 861863A NO 861863 A NO861863 A NO 861863A NO 174406 C NO174406 C NO 174406C
Authority
NO
Norway
Prior art keywords
true
data
complement
errors
parity
Prior art date
Application number
NO861863A
Other languages
English (en)
Norwegian (no)
Other versions
NO174406B (no
NO861863L (no
Inventor
Srikumar R Chandran
Mark S Walker
Edward J Rhodes
Albert S Lui
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of NO861863L publication Critical patent/NO861863L/no
Publication of NO174406B publication Critical patent/NO174406B/no
Publication of NO174406C publication Critical patent/NO174406C/no

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1654—Error detection by comparing the output of redundant processing systems where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Hardware Redundancy (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Alarm Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Debugging And Monitoring (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
  • Control Of Throttle Valves Provided In The Intake System Or In The Exhaust System (AREA)
  • Control Of Transmission Device (AREA)
  • Testing And Monitoring For Control Systems (AREA)
NO861863A 1985-05-10 1986-05-09 System for å sikre dataintegritet NO174406C (no)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US73367985A 1985-05-10 1985-05-10

Publications (3)

Publication Number Publication Date
NO861863L NO861863L (no) 1986-11-11
NO174406B NO174406B (no) 1994-01-17
NO174406C true NO174406C (no) 1994-04-27

Family

ID=24948680

Family Applications (1)

Application Number Title Priority Date Filing Date
NO861863A NO174406C (no) 1985-05-10 1986-05-09 System for å sikre dataintegritet

Country Status (8)

Country Link
US (1) US4785453A (de)
EP (1) EP0201356B1 (de)
JP (1) JPH0792765B2 (de)
AT (1) ATE81412T1 (de)
AU (1) AU568977B2 (de)
CA (1) CA1259415A (de)
DE (1) DE3686901T2 (de)
NO (1) NO174406C (de)

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US7333504B2 (en) * 2001-03-08 2008-02-19 Honeywell International Inc. Simultaneous serial transmission of messages with data field arbitration
US20040073721A1 (en) * 2002-10-10 2004-04-15 Koninklijke Philips Electronics N.V. DMA Controller for USB and like applications
US7237144B2 (en) 2004-04-06 2007-06-26 Hewlett-Packard Development Company, L.P. Off-chip lockstep checking
US7290169B2 (en) 2004-04-06 2007-10-30 Hewlett-Packard Development Company, L.P. Core-level processor lockstepping
US7296181B2 (en) 2004-04-06 2007-11-13 Hewlett-Packard Development Company, L.P. Lockstep error signaling
US7546441B1 (en) 2004-08-06 2009-06-09 Xilinx, Inc. Coprocessor interface controller
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US7590823B1 (en) 2004-08-06 2009-09-15 Xilinx, Inc. Method and system for handling an instruction not supported in a coprocessor formed using configurable logic
US7346759B1 (en) 2004-08-06 2008-03-18 Xilinx, Inc. Decoder interface
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RU2384877C2 (ru) * 2004-10-25 2010-03-20 Роберт Бош Гмбх Способ и устройство для генерирования сигнала в вычислительной системе, включающей в себя несколько компонентов
ATE407401T1 (de) * 2004-10-25 2008-09-15 Bosch Gmbh Robert Verfahren und vorrichtung zur erzeugung eines modussignals bei einem rechnersystem mit mehreren komponenten
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US7680144B2 (en) * 2006-09-12 2010-03-16 Honeywell International Inc. Device coupled between serial busses using bitwise arbitration
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US8140629B2 (en) * 2008-09-30 2012-03-20 Pivot Solutions, Inc. System and method for processing instant messages
JP5404437B2 (ja) * 2010-01-13 2014-01-29 株式会社東芝 安全出力装置
RU2453079C2 (ru) * 2010-08-17 2012-06-10 Елена Геннадиевна Тимофеева Устройство для контроля и резервирования информационной системы
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Also Published As

Publication number Publication date
AU568977B2 (en) 1988-01-14
CA1259415A (en) 1989-09-12
AU5720486A (en) 1986-11-13
EP0201356A2 (de) 1986-11-12
DE3686901T2 (de) 1993-02-18
NO174406B (no) 1994-01-17
NO861863L (no) 1986-11-11
JPH0792765B2 (ja) 1995-10-09
EP0201356B1 (de) 1992-10-07
DE3686901D1 (de) 1992-11-12
US4785453A (en) 1988-11-15
EP0201356A3 (en) 1988-11-30
JPS6231441A (ja) 1987-02-10
ATE81412T1 (de) 1992-10-15

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Legal Events

Date Code Title Description
MM1K Lapsed by not paying the annual fees

Free format text: LAPSED IN NOVEMBER 2001