NO20051557L - Hurtig, kontrollert utgangsbuffer - Google Patents

Hurtig, kontrollert utgangsbuffer

Info

Publication number
NO20051557L
NO20051557L NO20051557A NO20051557A NO20051557L NO 20051557 L NO20051557 L NO 20051557L NO 20051557 A NO20051557 A NO 20051557A NO 20051557 A NO20051557 A NO 20051557A NO 20051557 L NO20051557 L NO 20051557L
Authority
NO
Norway
Prior art keywords
transistor
terminal
controlled
terminal connected
control circuit
Prior art date
Application number
NO20051557A
Other languages
English (en)
Norwegian (no)
Inventor
Stefano Sivero
Davide Manfre
Lorenzo Bedarida
Original Assignee
Atmel Corp A Delaware Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/323,614 external-priority patent/US6734701B2/en
Application filed by Atmel Corp A Delaware Corp filed Critical Atmel Corp A Delaware Corp
Publication of NO20051557L publication Critical patent/NO20051557L/no

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00369—Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00384—Modifications for compensating variations of temperature, supply voltage or other physical parameters in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
NO20051557A 2002-09-18 2005-03-23 Hurtig, kontrollert utgangsbuffer NO20051557L (no)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
ITAO20020811 2002-09-18
US10/323,614 US6734701B2 (en) 2002-09-18 2002-12-18 Fast controlled output buffer
PCT/US2003/029307 WO2004027777A2 (fr) 2002-09-18 2003-09-16 Tampon de sortie a commande rapide

Publications (1)

Publication Number Publication Date
NO20051557L true NO20051557L (no) 2005-03-23

Family

ID=56290486

Family Applications (1)

Application Number Title Priority Date Filing Date
NO20051557A NO20051557L (no) 2002-09-18 2005-03-23 Hurtig, kontrollert utgangsbuffer

Country Status (3)

Country Link
EP (1) EP1559196A4 (fr)
KR (1) KR20050049496A (fr)
NO (1) NO20051557L (fr)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3929350C1 (en) * 1989-09-04 1990-07-19 Siemens Ag, 1000 Berlin Und 8000 Muenchen, De CMOS input to digital output signal level converter - has PMOS and NMOS FET control transistors and current limiter
JPH03121618A (ja) * 1989-10-04 1991-05-23 Toshiba Corp 出力回路
US5367210A (en) * 1992-02-12 1994-11-22 Lipp Robert J Output buffer with reduced noise
US5214320A (en) * 1992-06-12 1993-05-25 Smos Systems, Inc. System and method for reducing ground bounce in integrated circuit output buffers
US5703517A (en) * 1993-05-25 1997-12-30 Texas Insturments Incorporated Power reduction in a temperature compensating transistor circuit
DE19829487C1 (de) * 1998-07-01 1999-09-23 Siemens Ag Ausgangstreiber eines integrierten Halbleiterchips

Also Published As

Publication number Publication date
KR20050049496A (ko) 2005-05-25
EP1559196A2 (fr) 2005-08-03
EP1559196A4 (fr) 2009-07-01

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Legal Events

Date Code Title Description
FC2A Withdrawal, rejection or dismissal of laid open patent application