PL450732A3 - Metastability random generator - Google Patents

Metastability random generator

Info

Publication number
PL450732A3
PL450732A3 PL450732A PL45073224A PL450732A3 PL 450732 A3 PL450732 A3 PL 450732A3 PL 450732 A PL450732 A PL 450732A PL 45073224 A PL45073224 A PL 45073224A PL 450732 A3 PL450732 A3 PL 450732A3
Authority
PL
Poland
Prior art keywords
flip
flop
generator
gmic
flops
Prior art date
Application number
PL450732A
Other languages
Polish (pl)
Inventor
Piotr Z. Wieczorek
Krzysztof Gołofit
Original Assignee
Politechnika Warszawska
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from PL422480A external-priority patent/PL232382B1/en
Priority claimed from PL422477A external-priority patent/PL232380B1/en
Priority claimed from PL422479A external-priority patent/PL232381B1/en
Priority claimed from PL422478A external-priority patent/PL232335B1/en
Application filed by Politechnika Warszawska filed Critical Politechnika Warszawska
Publication of PL450732A3 publication Critical patent/PL450732A3/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/58Random or pseudo-random number generators
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Bus Control (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Control Of Eletrric Generators (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

Zgłoszenie dotyczy generatora metastabilnościowych interwałów czasowych (GMIC) metastabilnościowego generatora losowego i sposobu regulacji pracą generatora interwałów, zbudowanego z dwóch niezależnie pracujących przerzutników (P1, P2) dołączonych do jego wejść (i1-GMIC, i2-GMIC). Istotą generatora jest specjalna budowa przerzutników posiadających elementy równoważące, opóźniające i szereg wejść (lo1M1, lo2M1, lo1S1, lo2S1, lsS1, lo1M2, lo2M2, lo1S2, lo2S2, lsS2) pozwalających na sterowanie ich pracą. Pracą przerzutników steruje układ kompensacji i regulacji (UKR), który pozwala na: dopasowanie szybkości jednego przerzutnika względem drugiego, regulację pracy między stopniem master i slave w każdym przerzutniku, regulowane spowalnianie części slave w dużym zakresie, równoważenie pracy każdego stopnia każdego przerzutnika, wzorcowanie generatora, kompensację w trakcie pracy, czy regulację pobieranej mocy. Dzięki zgłoszeniu możliwa jest kompensacja rozrzutów technologicznych, zmiana położenia i rozmiaru okna metastabilności, ustalenie i regulacja czasu regeneracji przerzutnika, kompensacja wpływu starzenia się i pracy mechanicznej czy oddziaływania czynników środowiskowych.The application concerns a metastability time interval generator (GMIC) and a method for regulating the operation of the interval generator, constructed from two independently operating flip-flops (P1, P2) connected to its inputs (i1-GMIC, i2-GMIC). The generator's essence is the special design of the flip-flops, which incorporate balancing and delay elements and a series of inputs (lo1M1, lo2M1, lo1S1, lo2S1, lsS1, lo1M2, lo2M2, lo1S2, lo2S2, lsS2) enabling their control. The operation of the flip-flops is controlled by a compensation and regulation system (UKR), which allows for: matching the speed of one flip-flop relative to another, regulation of the operation between the master and slave stages in each flip-flop, adjustable slowing down of the slave part over a wide range, balancing the operation of each stage of each flip-flop, generator calibration, compensation during operation, and power consumption regulation. Thanks to the notification, it is possible to compensate for technological dispersion, change the position and size of the metastability window, determine and adjust the flip-flop regeneration time, compensate for the influence of aging and mechanical work or the impact of environmental factors.

PL450732A 2017-08-08 2024-12-27 Metastability random generator PL450732A3 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
PL422480A PL232382B1 (en) 2017-08-08 2017-08-08 Metastability random generator
PL422477A PL232380B1 (en) 2017-08-08 2017-08-08 Generator of metastability time intervals
PL422479A PL232381B1 (en) 2017-08-08 2017-08-08 Metastability random generator
PL422478A PL232335B1 (en) 2017-08-08 2017-08-08 Arbiter
PCT/IB2018/055941 WO2019030668A1 (en) 2017-08-08 2018-08-07 Metastability based random number generator

Publications (1)

Publication Number Publication Date
PL450732A3 true PL450732A3 (en) 2026-01-19

Family

ID=65271936

Family Applications (3)

Application Number Title Priority Date Filing Date
PL428402A PL241527B1 (en) 2017-08-08 2018-08-07 Metastability random generator
PL450733A PL450733A3 (en) 2017-08-08 2024-12-27 Metastability random generator
PL450732A PL450732A3 (en) 2017-08-08 2024-12-27 Metastability random generator

Family Applications Before (2)

Application Number Title Priority Date Filing Date
PL428402A PL241527B1 (en) 2017-08-08 2018-08-07 Metastability random generator
PL450733A PL450733A3 (en) 2017-08-08 2024-12-27 Metastability random generator

Country Status (2)

Country Link
PL (3) PL241527B1 (en)
WO (1) WO2019030668A1 (en)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07169269A (en) * 1993-12-14 1995-07-04 Matsushita Electric Ind Co Ltd Arbiter control circuit
KR100762264B1 (en) * 2005-06-14 2007-10-01 충남대학교산학협력단 Bus Matrix Structure Reduces Latency
PL225186B1 (en) * 2012-11-08 2017-02-28 Politechnika Warszawska Meta-stability intervals generator
PL224925B1 (en) * 2012-11-08 2017-02-28 Politechnika Warszawska Arbitrator

Also Published As

Publication number Publication date
PL241527B1 (en) 2022-10-17
WO2019030668A1 (en) 2019-02-14
PL450733A3 (en) 2026-01-19
PL428402A1 (en) 2020-02-24

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