SE434896B - Sett att bearbeta icke plana ytpartier av en struktur sa att hog upplosning och linjebreddreglering uppnas - Google Patents

Sett att bearbeta icke plana ytpartier av en struktur sa att hog upplosning och linjebreddreglering uppnas

Info

Publication number
SE434896B
SE434896B SE8003378A SE8003378A SE434896B SE 434896 B SE434896 B SE 434896B SE 8003378 A SE8003378 A SE 8003378A SE 8003378 A SE8003378 A SE 8003378A SE 434896 B SE434896 B SE 434896B
Authority
SE
Sweden
Prior art keywords
layer
pattern
relatively
relatively thick
etching
Prior art date
Application number
SE8003378A
Other languages
English (en)
Swedish (sv)
Other versions
SE8003378L (sv
Inventor
D B Fraser
D Maydan
J M Moran
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of SE8003378L publication Critical patent/SE8003378L/xx
Publication of SE434896B publication Critical patent/SE434896B/sv

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/094—Multilayer resist systems, e.g. planarising layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
    • H10P76/4088—Processes for improving the resolution of the masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041—Photolithographic processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2045—Electron beam lithography processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2047—X-ray beam lithography processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/68—Organic materials, e.g. photoresists
    • H10P14/683—Organic materials, e.g. photoresists carbon-based polymeric organic materials, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2

Landscapes

  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
SE8003378A 1978-09-11 1980-05-06 Sett att bearbeta icke plana ytpartier av en struktur sa att hog upplosning och linjebreddreglering uppnas SE434896B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/941,369 US4244799A (en) 1978-09-11 1978-09-11 Fabrication of integrated circuits utilizing thick high-resolution patterns

Publications (2)

Publication Number Publication Date
SE8003378L SE8003378L (sv) 1980-05-06
SE434896B true SE434896B (sv) 1984-08-20

Family

ID=25476352

Family Applications (1)

Application Number Title Priority Date Filing Date
SE8003378A SE434896B (sv) 1978-09-11 1980-05-06 Sett att bearbeta icke plana ytpartier av en struktur sa att hog upplosning och linjebreddreglering uppnas

Country Status (13)

Country Link
US (1) US4244799A (fr)
JP (1) JPS55500646A (fr)
BE (1) BE878667A (fr)
CA (1) CA1123118A (fr)
DE (1) DE2953117A1 (fr)
ES (1) ES483987A1 (fr)
FR (1) FR2435819A1 (fr)
GB (1) GB2043345B (fr)
IE (1) IE48479B1 (fr)
IT (1) IT1122539B (fr)
NL (1) NL7920069A (fr)
SE (1) SE434896B (fr)
WO (1) WO1980000639A1 (fr)

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2945854A1 (de) * 1979-11-13 1981-05-21 Deutsche Itt Industries Gmbh, 7800 Freiburg Ionenimplantationsverfahren
DE3027941A1 (de) * 1980-07-23 1982-02-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von reliefstrukturen aus doppellackschichten fuer integrierte halbleiterschaltungen, wobei zur strukturierung hochenergetische strahlung verwendet wird
US4323638A (en) * 1980-08-18 1982-04-06 Bell Telephone Laboratories, Incorporated Reducing charging effects in charged-particle-beam lithography
US4333793A (en) * 1980-10-20 1982-06-08 Bell Telephone Laboratories, Incorporated High-selectivity plasma-assisted etching of resist-masked layer
EP0050973B1 (fr) * 1980-10-28 1986-01-22 Kabushiki Kaisha Toshiba Procédé de masquage pour dispositif semiconducteurs utilisant une couche de polymère
US4362597A (en) * 1981-01-19 1982-12-07 Bell Telephone Laboratories, Incorporated Method of fabricating high-conductivity silicide-on-polysilicon structures for MOS devices
US4343677A (en) * 1981-03-23 1982-08-10 Bell Telephone Laboratories, Incorporated Method for patterning films using reactive ion etching thereof
US4377437A (en) * 1981-05-22 1983-03-22 Bell Telephone Laboratories, Incorporated Device lithography by selective ion implantation
US4407933A (en) * 1981-06-11 1983-10-04 Bell Telephone Laboratories, Incorporated Alignment marks for electron beam lithography
JPS58110038A (ja) * 1981-12-23 1983-06-30 Nec Corp パタ−ン形成方法
DE3275447D1 (en) * 1982-07-03 1987-03-19 Ibm Deutschland Process for the formation of grooves having essentially vertical lateral silicium walls by reactive ion etching
US4496419A (en) * 1983-02-28 1985-01-29 Cornell Research Foundation, Inc. Fine line patterning method for submicron devices
US4451349A (en) * 1983-04-20 1984-05-29 International Business Machines Corporation Electrode treatment for plasma patterning of polymers
US4510173A (en) * 1983-04-25 1985-04-09 Kabushiki Kaisha Toshiba Method for forming flattened film
US4572765A (en) * 1983-05-02 1986-02-25 Fairchild Camera & Instrument Corporation Method of fabricating integrated circuit structures using replica patterning
US4482424A (en) * 1983-05-06 1984-11-13 At&T Bell Laboratories Method for monitoring etching of resists by monitoring the flouresence of the unetched material
DE3475856D1 (en) * 1983-08-12 1989-02-02 Commissariat Energie Atomique Method for aligning a connecting line above an electrical contact hole of an integrated circuit
US5215867A (en) * 1983-09-16 1993-06-01 At&T Bell Laboratories Method with gas functionalized plasma developed layer
US4534826A (en) * 1983-12-29 1985-08-13 Ibm Corporation Trench etch process for dielectric isolation
JPS60214532A (ja) * 1984-04-11 1985-10-26 Nippon Telegr & Teleph Corp <Ntt> パタ−ン形成方法
US4523372A (en) * 1984-05-07 1985-06-18 Motorola, Inc. Process for fabricating semiconductor device
US4532005A (en) * 1984-05-21 1985-07-30 At&T Bell Laboratories Device lithography using multi-level resist systems
US4557797A (en) * 1984-06-01 1985-12-10 Texas Instruments Incorporated Resist process using anti-reflective coating
JPS60262150A (ja) * 1984-06-11 1985-12-25 Nippon Telegr & Teleph Corp <Ntt> 三層レジスト用中間層材料及びそれを用いた三層レジストパタン形成方法
US4683024A (en) * 1985-02-04 1987-07-28 American Telephone And Telegraph Company, At&T Bell Laboratories Device fabrication method using spin-on glass resins
US4693780A (en) * 1985-02-22 1987-09-15 Siemens Aktiengesellschaft Electrical isolation and leveling of patterned surfaces
US4609614A (en) * 1985-06-24 1986-09-02 Rca Corporation Process of using absorptive layer in optical lithography with overlying photoresist layer to form relief pattern on substrate
KR880701400A (ko) * 1986-03-24 1988-07-26 엘리 와이스 집적 회로 장치의 제조방법
ES2048158T3 (es) * 1986-06-26 1994-03-16 American Telephone & Telegraph Procedimiento para fabricar dispositivos de circuito integrado utilizando una estructura de resist multinivel.
US4892635A (en) * 1986-06-26 1990-01-09 American Telephone And Telegraph Company At&T Bell Laboratories Pattern transfer process utilizing multilevel resist structure for fabricating integrated-circuit devices
EP0313683A1 (fr) * 1987-10-30 1989-05-03 International Business Machines Corporation Méthode pour fabriquer une structure de circuit intégré semi-conducteur comprenant un élément de longueur submicrométrique
GB8729652D0 (en) * 1987-12-19 1988-02-03 Plessey Co Plc Semi-conductive devices fabricated on soi wafers
EP0338102B1 (fr) * 1988-04-19 1993-03-10 International Business Machines Corporation Procédé de fabrication de circuits intégrés à semi-conducteurs comportant des transistors à effet de champ ayant des canaux submicroniques
DE3886751T2 (de) * 1988-09-12 1994-06-23 Ibm Methode zum Ätzen von Spiegelfacetten an III-V-Halbleiterstrukturen.
JPH088243B2 (ja) * 1989-12-13 1996-01-29 三菱電機株式会社 表面クリーニング装置及びその方法
US5126231A (en) * 1990-02-26 1992-06-30 Applied Materials, Inc. Process for multi-layer photoresist etching with minimal feature undercut and unchanging photoresist load during etch
JP3041972B2 (ja) * 1991-01-10 2000-05-15 富士通株式会社 半導体装置の製造方法
US5323047A (en) * 1992-01-31 1994-06-21 Sgs-Thomson Microelectronics, Inc. Structure formed by a method of patterning a submicron semiconductor layer
US5264076A (en) * 1992-12-17 1993-11-23 At&T Bell Laboratories Integrated circuit process using a "hard mask"
US5326727A (en) * 1992-12-30 1994-07-05 At&T Bell Laboratories Method for integrated circuit fabrication including linewidth control during etching
US5950106A (en) * 1996-05-14 1999-09-07 Advanced Micro Devices, Inc. Method of patterning a metal substrate using spin-on glass as a hard mask
US5874010A (en) * 1996-07-17 1999-02-23 Headway Technologies, Inc. Pole trimming technique for high data rate thin film heads
EP0895278A3 (fr) * 1997-08-01 2000-08-23 Siemens Aktiengesellschaft Procédé de structuration
US6087270A (en) * 1998-06-18 2000-07-11 Micron Technology, Inc. Method of patterning substrates
US6136511A (en) * 1999-01-20 2000-10-24 Micron Technology, Inc. Method of patterning substrates using multilayer resist processing
DE60037395T2 (de) * 1999-03-09 2008-11-27 Tokyo Electron Ltd. Herstellung eines halbleiter-bauelementes
US6605412B2 (en) 2000-02-18 2003-08-12 Murata Manufacturing Co., Ltd. Resist pattern and method for forming wiring pattern
US6740469B2 (en) 2002-06-25 2004-05-25 Brewer Science Inc. Developer-soluble metal alkoxide coatings for microelectronic applications
US6872506B2 (en) * 2002-06-25 2005-03-29 Brewer Science Inc. Wet-developable anti-reflective compositions
US7507783B2 (en) * 2003-02-24 2009-03-24 Brewer Science Inc. Thermally curable middle layer comprising polyhedral oligomeric silsesouioxanes for 193-nm trilayer resist process
KR101189397B1 (ko) * 2003-10-15 2012-10-11 브레우어 사이언스 인코포레이션 비아-퍼스트 듀얼 다마신 적용예에서 사용되는 현상제에 용해성인 물질 및 상기 물질 사용 방법
US7320170B2 (en) * 2004-04-20 2008-01-22 Headway Technologies, Inc. Xenon ion beam to improve track width definition
US20070207406A1 (en) * 2004-04-29 2007-09-06 Guerrero Douglas J Anti-reflective coatings using vinyl ether crosslinkers
US20050255410A1 (en) 2004-04-29 2005-11-17 Guerrero Douglas J Anti-reflective coatings using vinyl ether crosslinkers
US7914974B2 (en) 2006-08-18 2011-03-29 Brewer Science Inc. Anti-reflective imaging layer for multiple patterning process
US20090008430A1 (en) * 2007-07-06 2009-01-08 Lucent Technologies Inc. Solder-bonding process
US8133659B2 (en) 2008-01-29 2012-03-13 Brewer Science Inc. On-track process for patterning hardmask by multiple dark field exposures
US9640396B2 (en) 2009-01-07 2017-05-02 Brewer Science Inc. Spin-on spacer materials for double- and triple-patterning lithography
CN103034047B (zh) * 2011-09-29 2014-10-29 上海微电子装备有限公司 一种提高分辨率的光刻工艺

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1230421A (fr) * 1967-09-15 1971-05-05
US3867216A (en) * 1972-05-12 1975-02-18 Adir Jacob Process and material for manufacturing semiconductor devices
US3873361A (en) * 1973-11-29 1975-03-25 Ibm Method of depositing thin film utilizing a lift-off mask
DE2547792C3 (de) * 1974-10-25 1978-08-31 Hitachi, Ltd., Tokio Verfahren zur Herstellung eines Halbleiterbauelementes
US3962004A (en) * 1974-11-29 1976-06-08 Rca Corporation Pattern definition in an organic layer
US4024041A (en) * 1974-12-18 1977-05-17 Hitachi, Ltd. Method of forming deposition films for use in multi-layer metallization
US3985597A (en) * 1975-05-01 1976-10-12 International Business Machines Corporation Process for forming passivated metal interconnection system with a planar surface
US4004044A (en) * 1975-05-09 1977-01-18 International Business Machines Corporation Method for forming patterned films utilizing a transparent lift-off mask
JPS609342B2 (ja) * 1975-05-28 1985-03-09 株式会社日立製作所 パタ−ンの作製法
JPS5269270A (en) * 1975-12-05 1977-06-08 Matsushita Electronics Corp Coating method of photoresist
DE2629996A1 (de) * 1976-07-03 1978-01-05 Ibm Deutschland Verfahren zur passivierung und planarisierung eines metallisierungsmusters
US4070501A (en) * 1976-10-28 1978-01-24 Ibm Corporation Forming self-aligned via holes in thin film interconnection systems
US4092442A (en) * 1976-12-30 1978-05-30 International Business Machines Corporation Method of depositing thin films utilizing a polyimide mask

Also Published As

Publication number Publication date
IT7925589A0 (it) 1979-09-10
IE791715L (en) 1980-03-11
SE8003378L (sv) 1980-05-06
DE2953117A1 (en) 1980-11-27
ES483987A1 (es) 1980-04-01
CA1123118A (fr) 1982-05-04
FR2435819A1 (fr) 1980-04-04
WO1980000639A1 (fr) 1980-04-03
US4244799A (en) 1981-01-13
GB2043345B (en) 1983-05-18
NL7920069A (nl) 1980-07-31
GB2043345A (en) 1980-10-01
BE878667A (fr) 1979-12-31
JPS55500646A (fr) 1980-09-11
IT1122539B (it) 1986-04-23
IE48479B1 (en) 1985-02-06

Similar Documents

Publication Publication Date Title
SE434896B (sv) Sett att bearbeta icke plana ytpartier av en struktur sa att hog upplosning och linjebreddreglering uppnas
Hatzakis Electron resists for microcircuit and mask production
US4025411A (en) Fabricating semiconductor device utilizing a physical ion etching process
EP0470707B1 (fr) Méthode pour structurer une couche
KR930000293B1 (ko) 미세패턴형성방법
US5308742A (en) Method of etching anti-reflection coating
US4315984A (en) Method of producing a semiconductor device
US4871418A (en) Process for fabricating arbitrarily shaped through holes in a component
JPH0620062B2 (ja) 半導体デバイスの製造方法
DE3203898C2 (fr)
US5840622A (en) Phase mask laser fabrication of fine pattern electronic interconnect structures
US5759625A (en) Fluoropolymer protectant layer for high temperature superconductor film and photo-definition thereof
US4076860A (en) Method of forming electrode wirings in semiconductor devices
Widmann Metallization for integrated circuits using a lift-off technique
US3483108A (en) Method of chemically etching a non-conductive material using an electrolytically controlled mask
US3644180A (en) Methods of using inorganic resists
JPS6211068B2 (fr)
US5445998A (en) Method for the global planarization of surfaces of semiconductor integrated circuits
US5262282A (en) Pattern forming method
EP0104235A4 (fr) Procede de formation d&#39;un materiau de protection lithographique hybride a rayon electronique/optique.
US5474956A (en) Method of fabricating metallized substrates using an organic etch block layer
US5178975A (en) High resolution X-ray mask having high aspect ratio absorber patterns
US4407859A (en) Planar bubble memory circuit fabrication
Homma et al. Feature size limit of liftoff metallization technology
JP3422428B2 (ja) 微細加工レジストパターンの形成方法