SE514785C2 - Processor och metod för att exekvera instruktioner från flera instruktionskällor - Google Patents

Processor och metod för att exekvera instruktioner från flera instruktionskällor

Info

Publication number
SE514785C2
SE514785C2 SE9900118A SE9900118A SE514785C2 SE 514785 C2 SE514785 C2 SE 514785C2 SE 9900118 A SE9900118 A SE 9900118A SE 9900118 A SE9900118 A SE 9900118A SE 514785 C2 SE514785 C2 SE 514785C2
Authority
SE
Sweden
Prior art keywords
instruction
processor
internal processor
external
source
Prior art date
Application number
SE9900118A
Other languages
English (en)
Swedish (sv)
Other versions
SE9900118L (sv
SE9900118D0 (sv
Inventor
Stefan Sandstroem
Stefan Lundberg
Original Assignee
Axis Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Axis Ab filed Critical Axis Ab
Priority to SE9900118A priority Critical patent/SE514785C2/sv
Publication of SE9900118D0 publication Critical patent/SE9900118D0/xx
Priority to PCT/SE2000/000040 priority patent/WO2000042506A1/en
Priority to AU23357/00A priority patent/AU2335700A/en
Priority to ES00902227T priority patent/ES2316347T3/es
Priority to CNB008028206A priority patent/CN1153136C/zh
Priority to AT00902227T priority patent/ATE413645T1/de
Priority to EP00902227A priority patent/EP1177499B1/en
Priority to DE60040733T priority patent/DE60040733D1/de
Priority to JP2000594015A priority patent/JP2002535749A/ja
Priority to KR1020017008841A priority patent/KR100705872B1/ko
Publication of SE9900118L publication Critical patent/SE9900118L/xx
Publication of SE514785C2 publication Critical patent/SE514785C2/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/321—Program or instruction counter, e.g. incrementing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
SE9900118A 1999-01-18 1999-01-18 Processor och metod för att exekvera instruktioner från flera instruktionskällor SE514785C2 (sv)

Priority Applications (10)

Application Number Priority Date Filing Date Title
SE9900118A SE514785C2 (sv) 1999-01-18 1999-01-18 Processor och metod för att exekvera instruktioner från flera instruktionskällor
KR1020017008841A KR100705872B1 (ko) 1999-01-18 2000-01-13 몇몇의 명령원으로부터의 명령 실행 프로세서 및 방법
CNB008028206A CN1153136C (zh) 1999-01-18 2000-01-13 执行来自多个指令源的指令的处理器和方法
AU23357/00A AU2335700A (en) 1999-01-18 2000-01-13 Processor and method of executing instructions from several instruction sources
ES00902227T ES2316347T3 (es) 1999-01-18 2000-01-13 Procesador y metodo de ejecucion de instrucciones desde varias fuentes de instruccion.
PCT/SE2000/000040 WO2000042506A1 (en) 1999-01-18 2000-01-13 Processor and method of executing instructions from several instruction sources
AT00902227T ATE413645T1 (de) 1999-01-18 2000-01-13 Prozessor und verfahren zum ausführen von instruktionen von mehreren instruktionsquellen
EP00902227A EP1177499B1 (en) 1999-01-18 2000-01-13 Processor and method of executing instructions from several instruction sources
DE60040733T DE60040733D1 (de) 1999-01-18 2000-01-13 Prozessor und verfahren zum ausführen von instruktionen von mehreren instruktionsquellen
JP2000594015A JP2002535749A (ja) 1999-01-18 2000-01-13 複数の命令ソースからの命令を実行するプロセッサおよび方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9900118A SE514785C2 (sv) 1999-01-18 1999-01-18 Processor och metod för att exekvera instruktioner från flera instruktionskällor

Publications (3)

Publication Number Publication Date
SE9900118D0 SE9900118D0 (sv) 1999-01-18
SE9900118L SE9900118L (sv) 2000-07-19
SE514785C2 true SE514785C2 (sv) 2001-04-23

Family

ID=20414117

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9900118A SE514785C2 (sv) 1999-01-18 1999-01-18 Processor och metod för att exekvera instruktioner från flera instruktionskällor

Country Status (10)

Country Link
EP (1) EP1177499B1 (es)
JP (1) JP2002535749A (es)
KR (1) KR100705872B1 (es)
CN (1) CN1153136C (es)
AT (1) ATE413645T1 (es)
AU (1) AU2335700A (es)
DE (1) DE60040733D1 (es)
ES (1) ES2316347T3 (es)
SE (1) SE514785C2 (es)
WO (1) WO2000042506A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007098024A2 (en) 2006-02-16 2007-08-30 Vns Portfolio Llc Allocation of resources among an array of computers
EP1821211A3 (en) * 2006-02-16 2008-06-18 Technology Properties Limited Cooperative multitasking method in a multiprocessor system
US7617383B2 (en) 2006-02-16 2009-11-10 Vns Portfolio Llc Circular register arrays of a computer
TW200817925A (en) 2006-03-31 2008-04-16 Technology Properties Ltd Method and apparatus for operating a computer processor array
US7555637B2 (en) 2007-04-27 2009-06-30 Vns Portfolio Llc Multi-port read/write operations based on register bits set for indicating select ports and transfer directions
CN102033736A (zh) * 2010-12-31 2011-04-27 清华大学 一种指令集可扩展处理器的控制方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2215873A (en) * 1988-03-23 1989-09-27 Benchmark Technologies Inter-processor status communication
US5410544A (en) * 1993-06-30 1995-04-25 Intel Corporation External tester control for flash memory

Also Published As

Publication number Publication date
AU2335700A (en) 2000-08-01
KR20010101498A (ko) 2001-11-14
CN1337023A (zh) 2002-02-20
KR100705872B1 (ko) 2007-04-09
ES2316347T3 (es) 2009-04-16
EP1177499B1 (en) 2008-11-05
CN1153136C (zh) 2004-06-09
DE60040733D1 (de) 2008-12-18
SE9900118L (sv) 2000-07-19
JP2002535749A (ja) 2002-10-22
EP1177499A1 (en) 2002-02-06
WO2000042506A1 (en) 2000-07-20
SE9900118D0 (sv) 1999-01-18
ATE413645T1 (de) 2008-11-15

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