SE7610997L - Kretsanordning for att ersetta felaktig programinformation i ett oforenderligt minnes celler med giltig programinformation - Google Patents

Kretsanordning for att ersetta felaktig programinformation i ett oforenderligt minnes celler med giltig programinformation

Info

Publication number
SE7610997L
SE7610997L SE7610997A SE7610997A SE7610997L SE 7610997 L SE7610997 L SE 7610997L SE 7610997 A SE7610997 A SE 7610997A SE 7610997 A SE7610997 A SE 7610997A SE 7610997 L SE7610997 L SE 7610997L
Authority
SE
Sweden
Prior art keywords
program information
conversible
memory cell
circuit device
valid
Prior art date
Application number
SE7610997A
Other languages
English (en)
Other versions
SE420448B (sv
Inventor
J C Moran
C H Divine
Original Assignee
Western Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co filed Critical Western Electric Co
Publication of SE7610997L publication Critical patent/SE7610997L/sv
Publication of SE420448B publication Critical patent/SE420448B/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G06F8/66—Updates of program code stored in read-only memory [ROM]

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Stored Programmes (AREA)
SE7610997A 1975-10-16 1976-10-04 Kretsanordning for att med giltig programinformation lappa felaktig programinformation i ett icke endringsbart minnes celler SE420448B (sv)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/622,940 US4028684A (en) 1975-10-16 1975-10-16 Memory patching circuit with repatching capability

Publications (2)

Publication Number Publication Date
SE7610997L true SE7610997L (sv) 1977-04-17
SE420448B SE420448B (sv) 1981-10-05

Family

ID=24496132

Family Applications (2)

Application Number Title Priority Date Filing Date
SE7610997A SE420448B (sv) 1975-10-16 1976-10-04 Kretsanordning for att med giltig programinformation lappa felaktig programinformation i ett icke endringsbart minnes celler
SE8000179A SE8000179L (sv) 1975-10-16 1980-01-09 Kretsanordning for att med giltig programinformation lappa felaktig programinformation i ett icke endringsbart minnes celler

Family Applications After (1)

Application Number Title Priority Date Filing Date
SE8000179A SE8000179L (sv) 1975-10-16 1980-01-09 Kretsanordning for att med giltig programinformation lappa felaktig programinformation i ett icke endringsbart minnes celler

Country Status (9)

Country Link
US (1) US4028684A (sv)
JP (1) JPS5248937A (sv)
CA (1) CA1062377A (sv)
DE (1) DE2646163C3 (sv)
FR (1) FR2328263A1 (sv)
GB (1) GB1531528A (sv)
IT (1) IT1073062B (sv)
NL (1) NL7611436A (sv)
SE (2) SE420448B (sv)

Families Citing this family (50)

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US4156926A (en) * 1976-06-01 1979-05-29 Texas Instruments Incorporated PROM circuit board programmer
JPS5580164A (en) * 1978-12-13 1980-06-17 Fujitsu Ltd Main memory constitution control system
FR2445989B1 (fr) * 1979-01-02 1987-06-26 Honeywell Inf Systems Dispositif de determination de priorite et d'interruption d'un systeme de traitement de donnees
US4271467A (en) * 1979-01-02 1981-06-02 Honeywell Information Systems Inc. I/O Priority resolver
JPS5919835B2 (ja) * 1980-12-12 1984-05-09 善造 中塚 転写箔による箔着け法
US4456966A (en) * 1981-02-26 1984-06-26 International Business Machines Corporation Memory system with flexible replacement units
US4497020A (en) * 1981-06-30 1985-01-29 Ampex Corporation Selective mapping system and method
US4400798A (en) * 1981-07-13 1983-08-23 Tektronix, Inc. Memory patching system
US4420807A (en) * 1981-08-31 1983-12-13 International Business Machines Corporation Selectively holding data in a buffer for defective backing store tracks
GB2129585B (en) * 1982-10-29 1986-03-05 Inmos Ltd Memory system including a faulty rom array
US4427716A (en) * 1983-01-21 1984-01-24 General Electric Company Method for predetermining peel strength at copper/aluminum interface
GB2136992A (en) * 1983-03-18 1984-09-26 Georg V Coza Method and System of Ensuring Integrity of Data in an Electronic Memory
JPS60196854A (ja) * 1984-03-19 1985-10-05 Olympus Optical Co Ltd 情報検索システム
JPS628496U (sv) * 1985-06-29 1987-01-19
US4757474A (en) * 1986-01-28 1988-07-12 Fujitsu Limited Semiconductor memory device having redundancy circuit portion
JPH0746310B2 (ja) * 1987-06-30 1995-05-17 三菱電機株式会社 半導体論理回路
US5291615A (en) * 1988-08-11 1994-03-01 Kabushiki Kaisha Toshiba Instruction pipeline microprocessor
GB8912866D0 (en) * 1989-06-05 1989-07-26 Code Masters Softwara Interfacing device for a computer games system
US5112051A (en) * 1989-06-05 1992-05-12 Westinghouse Electric Corp. Interfacing device for a computer games system
US5109504A (en) * 1989-12-29 1992-04-28 Texas Instruments Incorporated Graphics program adaptor
JPH03240127A (ja) * 1990-02-17 1991-10-25 Hitachi Maxell Ltd プログラム制御システム
GB9011679D0 (en) * 1990-05-24 1990-07-11 Schlumberger Ind Ltd Mask-programmable microprocessors
JP2504312B2 (ja) * 1990-08-29 1996-06-05 三菱電機株式会社 プライオリティエンコ―ダ及びそれを備えたデ―タ処理装置
FR2667417B1 (fr) * 1990-10-02 1992-11-27 Gemplus Card Int Carte a microprocesseur concue pour recevoir des programmes multiples en memoire programmable.
US5269019A (en) * 1991-04-08 1993-12-07 Storage Technology Corporation Non-volatile memory storage and bilevel index structure for fast retrieval of modified records of a disk track
JPH04346127A (ja) 1991-05-23 1992-12-02 Sony Corp 電子装置
DE59108956D1 (de) * 1991-09-30 1998-04-23 Siemens Ag Verfahren zur Erstellung einer ablauffähigen Konfiguration eines in einen Systemspeicherbereich eines Prozessorsystems ladbaren Systemprogramms
US5623665A (en) * 1992-01-13 1997-04-22 Sony Corporation Electronic apparatus for patching a read-only memory
JP3230262B2 (ja) * 1992-01-24 2001-11-19 ソニー株式会社 電子装置及びその固定情報修正方法
JPH06318261A (ja) * 1992-09-18 1994-11-15 Sony Corp 電子装置
JP3284614B2 (ja) * 1992-09-19 2002-05-20 ソニー株式会社 電子装置
JP3810805B2 (ja) * 1992-09-19 2006-08-16 ソニー株式会社 情報修正システム
JPH06242990A (ja) * 1993-02-12 1994-09-02 Fujitsu Ltd メモリパッチ装置
US5581776A (en) * 1995-02-03 1996-12-03 Nokia Mobile Phones Limited Branch control system for rom-programmed processor
US6421679B1 (en) 1995-10-27 2002-07-16 International Business Machines Corporation Concurrent patch to logical partition manager of a logically partitioned system
US5832263A (en) * 1996-03-15 1998-11-03 Digidox, Inc. System and method for in-place modification of information recorded in read-only storage using modifiable non-volatile storage associated with an agent
US5901225A (en) * 1996-12-05 1999-05-04 Advanced Micro Devices, Inc. System and method for performing software patches in embedded systems
US6141740A (en) * 1997-03-03 2000-10-31 Advanced Micro Devices, Inc. Apparatus and method for microcode patching for generating a next address
US6189145B1 (en) 1997-05-28 2001-02-13 International Business Machines Corporation Concurrent patch to logical partition manager of a logically partitioned system
US6135651A (en) * 1997-05-29 2000-10-24 Cirrus Logic, Inc. Patching apparatus and method for upgrading modem software code
US6073252A (en) * 1997-09-25 2000-06-06 Motorola, Inc. Data processing system with memory patching and method thereof
US6158018A (en) * 1997-11-25 2000-12-05 Philips Semiconductor, Inc. Integrated circuit including patching circuitry to bypass portions of an internally flawed read only memory and a method therefore
US6438664B1 (en) 1999-10-27 2002-08-20 Advanced Micro Devices, Inc. Microcode patch device and method for patching microcode using match registers and patch routines
US6463549B1 (en) * 2000-09-28 2002-10-08 Motorola, Inc. Device and method for patching code residing on a read only memory module utilizing a random access memory for storing a set of fields, each field indicating validity of content of a group, and for receiving an address of a memory portion of the read only memory
US6925521B2 (en) * 2001-09-10 2005-08-02 Texas Instruments Incorporated Scheme for implementing breakpoints for on-chip ROM code patching
US7302605B2 (en) * 2003-10-23 2007-11-27 International Business Machines Corporation Method and structure for replacing faulty operating code contained in a ROM for a processor
US7464248B2 (en) * 2005-04-25 2008-12-09 Mediatek Incorporation Microprocessor systems and bus address translation methods
JP4911576B2 (ja) * 2006-03-24 2012-04-04 株式会社メガチップス 情報処理装置および追記型メモリ利用方法
CN103092655B (zh) * 2011-02-21 2016-09-28 北京奇虎科技有限公司 补丁包信息的输出方法及装置
CN116189745B (zh) * 2023-04-26 2023-09-15 长鑫存储技术有限公司 存储器和命令序列处理系统

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5333337B2 (sv) * 1973-08-21 1978-09-13
US3934227A (en) * 1973-12-05 1976-01-20 Digital Computer Controls, Inc. Memory correction system

Also Published As

Publication number Publication date
DE2646163C3 (de) 1980-08-14
NL7611436A (nl) 1977-04-19
SE8000179L (sv) 1980-01-09
DE2646163B2 (de) 1979-11-29
IT1073062B (it) 1985-04-13
FR2328263B1 (sv) 1981-12-11
FR2328263A1 (fr) 1977-05-13
SE420448B (sv) 1981-10-05
JPS5248937A (en) 1977-04-19
JPS5543133B2 (sv) 1980-11-05
GB1531528A (en) 1978-11-08
DE2646163A1 (de) 1977-04-28
CA1062377A (en) 1979-09-11
US4028684A (en) 1977-06-07

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