SG31395G - Method for fabricating integrated circuits with silicide - Google Patents

Method for fabricating integrated circuits with silicide

Info

Publication number
SG31395G
SG31395G SG31395A SG31395A SG31395G SG 31395 G SG31395 G SG 31395G SG 31395 A SG31395 A SG 31395A SG 31395 A SG31395 A SG 31395A SG 31395 G SG31395 G SG 31395G
Authority
SG
Singapore
Prior art keywords
silicide
integrated circuits
fabricating integrated
fabricating
circuits
Prior art date
Application number
SG31395A
Other languages
English (en)
Inventor
Ruichen Liu
Chih-Yuan Lu
Chien-Shing Pai
Nun-Sian Tsai
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Priority to SG31395A priority Critical patent/SG31395G/en
Publication of SG31395G publication Critical patent/SG31395G/en

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
    • H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
    • H10D64/0131—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional conductive layer comprising a silicide layer formed by the silicidation reaction between the layer of silicon with a metal layer which is not formed by metal implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H10D64/0111—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors
    • H10D64/0112—Manufacture or treatment of electrodes ohmically coupled to a semiconductor to Group IV semiconductors using conductive layers comprising silicides
SG31395A 1989-04-11 1995-02-22 Method for fabricating integrated circuits with silicide SG31395G (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
SG31395A SG31395G (en) 1989-04-11 1995-02-22 Method for fabricating integrated circuits with silicide

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US33638289A 1989-04-11 1989-04-11
SG31395A SG31395G (en) 1989-04-11 1995-02-22 Method for fabricating integrated circuits with silicide

Publications (1)

Publication Number Publication Date
SG31395G true SG31395G (en) 1995-08-18

Family

ID=23315836

Family Applications (1)

Application Number Title Priority Date Filing Date
SG31395A SG31395G (en) 1989-04-11 1995-02-22 Method for fabricating integrated circuits with silicide

Country Status (6)

Country Link
EP (1) EP0392725B1 (ja)
JP (1) JPH02296323A (ja)
DE (1) DE69013962T2 (ja)
ES (1) ES2063262T3 (ja)
HK (1) HK49196A (ja)
SG (1) SG31395G (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3294041B2 (ja) * 1994-02-21 2002-06-17 株式会社東芝 半導体装置
US5849634A (en) * 1994-04-15 1998-12-15 Sharp Kk Method of forming silicide film on silicon with oxygen concentration below 1018 /cm3
JP2692617B2 (ja) * 1994-12-06 1997-12-17 日本電気株式会社 半導体装置の製造方法
US5593924A (en) * 1995-06-02 1997-01-14 Texas Instruments Incorporated Use of a capping layer to attain low titanium-silicide sheet resistance and uniform silicide thickness for sub-micron silicon and polysilicon lines
US6376372B1 (en) * 1995-06-02 2002-04-23 Texas Instruments Incorporated Approaches for mitigating the narrow poly-line effect in silicide formation
US5661085A (en) * 1996-06-17 1997-08-26 Chartered Semiconductor Manufacturing Pte, Ltd. Method for forming a low contact leakage and low contact resistance integrated circuit device electrode
US5668065A (en) * 1996-08-01 1997-09-16 Winbond Electronics Corp. Process for simultaneous formation of silicide-based self-aligned contacts and local interconnects

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4657628A (en) * 1985-05-01 1987-04-14 Texas Instruments Incorporated Process for patterning local interconnects
JPS6261345A (ja) * 1985-09-11 1987-03-18 Hitachi Ltd 半導体装置の製造方法
JPS62188223A (ja) * 1986-01-16 1987-08-17 Sony Corp 半導体化合物の製造方法
US4690730A (en) * 1986-03-07 1987-09-01 Texas Instruments Incorporated Oxide-capped titanium silicide formation
JPS63133622A (ja) * 1986-11-26 1988-06-06 Ricoh Co Ltd 半導体装置の製造方法
JPS63265468A (ja) * 1987-04-23 1988-11-01 Fujitsu Ltd 半導体装置の製造方法
JPS63284862A (ja) * 1987-05-15 1988-11-22 Fujitsu Ltd 半導体装置の製造方法
US4940509A (en) * 1988-03-25 1990-07-10 Texas Instruments, Incorporated Isotropic etchant for capped silicide processes

Also Published As

Publication number Publication date
EP0392725A3 (en) 1991-10-30
HK49196A (en) 1996-03-29
EP0392725B1 (en) 1994-11-09
EP0392725A2 (en) 1990-10-17
DE69013962T2 (de) 1995-03-16
ES2063262T3 (es) 1995-01-01
DE69013962D1 (de) 1994-12-15
JPH02296323A (ja) 1990-12-06

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