SG48467A1 - A terabit per second packet switch having assignable multiple packet loss probabilities - Google Patents

A terabit per second packet switch having assignable multiple packet loss probabilities

Info

Publication number
SG48467A1
SG48467A1 SG1996010345A SG1996010345A SG48467A1 SG 48467 A1 SG48467 A1 SG 48467A1 SG 1996010345 A SG1996010345 A SG 1996010345A SG 1996010345 A SG1996010345 A SG 1996010345A SG 48467 A1 SG48467 A1 SG 48467A1
Authority
SG
Singapore
Prior art keywords
loss probabilities
terabit per
packet
packet loss
assignable
Prior art date
Application number
SG1996010345A
Other languages
English (en)
Inventor
Gaylord Warner Richards
Thomas Jay Cloonan
Original Assignee
At & T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by At & T Corp filed Critical At & T Corp
Publication of SG48467A1 publication Critical patent/SG48467A1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/10—Packet switching elements characterised by the switching fabric construction
    • H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
    • H04L49/105—ATM switching elements
    • H04L49/106—ATM switching elements using space switching, e.g. crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/15—Interconnection of switching modules
    • H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
    • H04L49/1576—Crossbar or matrix
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/25—Routing or path finding in a switch fabric
    • H04L49/253—Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/255—Control mechanisms for ATM switching fabrics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5647—Cell loss
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5651—Priority, marking, classes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5638—Services, e.g. multimedia, GOS, QOS
    • H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
    • H04L2012/5652—Cell construction, e.g. including header, packetisation, depacketisation, assembly, reassembly
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H04L12/56—Packet switching systems
    • H04L12/5601—Transfer mode dependent, e.g. ATM
    • H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
    • H04L2012/5681—Buffer or queue management

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
SG1996010345A 1995-08-31 1996-07-25 A terabit per second packet switch having assignable multiple packet loss probabilities SG48467A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/522,209 US5724352A (en) 1995-08-31 1995-08-31 Terabit per second packet switch having assignable multiple packet loss probabilities

Publications (1)

Publication Number Publication Date
SG48467A1 true SG48467A1 (en) 1998-04-17

Family

ID=24079920

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996010345A SG48467A1 (en) 1995-08-31 1996-07-25 A terabit per second packet switch having assignable multiple packet loss probabilities

Country Status (7)

Country Link
US (1) US5724352A (de)
EP (1) EP0760589A3 (de)
JP (1) JPH09130404A (de)
CN (1) CN1149223A (de)
AU (1) AU701967B2 (de)
CA (1) CA2180775C (de)
SG (1) SG48467A1 (de)

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GB2334651A (en) * 1998-02-18 1999-08-25 Power X Limited Scheduling means for data switching apparatus
US6772256B1 (en) * 1998-05-27 2004-08-03 Micron Technology, Inc. Routing arbiter for data network switching
US6636932B1 (en) * 1998-05-27 2003-10-21 Micron Technology, Inc. Crossbar switch and control for data networks switching
EP0986226B1 (de) 1998-09-11 2007-01-17 Hitachi, Ltd. IP-Paketkommunikationsvorrichtung
US6611518B1 (en) * 1998-09-18 2003-08-26 Samsung Electronics Co., Ltd. Methods and apparatus for flexible device interface port assignment in a data communications switching system
JP3344383B2 (ja) * 1999-10-04 2002-11-11 日本電気株式会社 スケジューラ
US6724758B1 (en) * 1999-12-20 2004-04-20 Cisco Technology, Inc. Stage specific dilation in multi-stage interconnection networks
US7016365B1 (en) * 2000-03-31 2006-03-21 Intel Corporation Switching fabric including a plurality of crossbar sections
JP3816314B2 (ja) * 2000-07-11 2006-08-30 三菱電機株式会社 パケット交換装置
US6721313B1 (en) 2000-08-01 2004-04-13 International Business Machines Corporation Switch fabric architecture using integrated serdes transceivers
US6885679B1 (en) * 2000-09-29 2005-04-26 Nortel Networks Limited System and method for layer 2 frame delineation recovery
US6868085B1 (en) 2000-10-27 2005-03-15 Telefonaktiebolaget Lm Ericsson (Publ) Method for parallel searching a look-up table
US6894970B1 (en) * 2000-10-31 2005-05-17 Chiaro Networks, Ltd. Router switch fabric protection using forward error correction
US7420969B2 (en) * 2000-11-29 2008-09-02 Rmi Corporation Network switch with a parallel shared memory
US7050391B1 (en) * 2000-12-22 2006-05-23 Turin Networks Method and apparatus for efficient link redundancy
KR20020054207A (ko) * 2000-12-27 2002-07-06 오길록 분배결합 패킷 스위칭 장치
US20020136229A1 (en) * 2001-01-09 2002-09-26 Lucent Technologies, Inc. Non-blocking crossbar and method of operation thereof
US6608836B2 (en) * 2001-05-10 2003-08-19 Turin Networks Method and apparatus for egress channel architecture that supports protection within SONET/sdh based networks
US6999468B2 (en) * 2001-06-04 2006-02-14 Turin Networks Method and apparatus for line and path selection within SONET/SDH based networks
US7031261B1 (en) 2001-06-04 2006-04-18 Turin Networks Method and apparatus for egress channel architecture that supports protection within SONET/SDH based networks
EP1271825A1 (de) * 2001-06-25 2003-01-02 Lucent Technologies Inc. Verfahren und System zur Übertragung von multiplexierten optischen Nachrichten
US7154887B2 (en) * 2001-07-12 2006-12-26 Lsi Logic Corporation Non-blocking grooming switch
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US7551640B1 (en) * 2002-09-20 2009-06-23 Cisco Technology, Inc. Method and apparatus for errorless frame timing adjustment
US7656880B1 (en) * 2004-06-09 2010-02-02 Verizon Laboratories Inc. Prioritized segmentation and reassembly methods and systems
JP2006065457A (ja) * 2004-08-25 2006-03-09 Fuji Xerox Co Ltd インタフェース回路生成装置およびインタフェース回路
US7382185B1 (en) * 2004-09-10 2008-06-03 Rockwell Collins, Inc. Loop segment switching system
US7873056B2 (en) * 2004-11-18 2011-01-18 Nec Corporation Switch device, switching method and switch control program
JP4673712B2 (ja) * 2005-09-28 2011-04-20 富士通株式会社 ネットワーク構成装置およびネットワーク構成方法
US7356638B2 (en) * 2005-10-12 2008-04-08 International Business Machines Corporation Using out-of-band signaling to provide communication between storage controllers in a computer storage system
US8363649B2 (en) * 2007-05-25 2013-01-29 Konda Technologies Inc. Fully connected generalized multi-link multi-stage networks
US7683665B1 (en) 2009-04-21 2010-03-23 International Business Machines Corporation Multiple parallel programmable finite state machines using a shared transition table
US8958418B2 (en) * 2011-05-20 2015-02-17 Cisco Technology, Inc. Frame handling within multi-stage switching fabrics
US10523500B2 (en) * 2017-09-26 2019-12-31 Quanta Computer Inc. Method and system for automatically configuring fanout mode of a network switch port in an interconnected network
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Also Published As

Publication number Publication date
US5724352A (en) 1998-03-03
CN1149223A (zh) 1997-05-07
EP0760589A2 (de) 1997-03-05
CA2180775C (en) 2001-02-13
EP0760589A3 (de) 1999-01-13
CA2180775A1 (en) 1997-03-01
JPH09130404A (ja) 1997-05-16
AU6426996A (en) 1997-03-06
AU701967B2 (en) 1999-02-11

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