SG49842A1 - Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor - Google Patents

Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor

Info

Publication number
SG49842A1
SG49842A1 SG1996007397A SG1996007397A SG49842A1 SG 49842 A1 SG49842 A1 SG 49842A1 SG 1996007397 A SG1996007397 A SG 1996007397A SG 1996007397 A SG1996007397 A SG 1996007397A SG 49842 A1 SG49842 A1 SG 49842A1
Authority
SG
Singapore
Prior art keywords
film carrier
semiconductor
mounting structure
wiring substrate
device made
Prior art date
Application number
SG1996007397A
Other languages
English (en)
Inventor
Amane Mochizuki
Atsushi Shinozaki
Kazuo Ouchi
Kazuto Shinozaki
Masakazu Sugimoto
Mikio Aizawa
Munekaza Tanaka
Shoji Morita
Takanori Miyoshi
Tetsuya Miyoshi
Yoshinari Takayama
Original Assignee
Nitto Denko Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP28320788A external-priority patent/JPH0760840B2/ja
Priority claimed from JP1050793A external-priority patent/JP2785832B2/ja
Priority claimed from JP1050792A external-priority patent/JP2815113B2/ja
Priority claimed from JP1181272A external-priority patent/JP2634672B2/ja
Priority claimed from JP1197680A external-priority patent/JP2654189B2/ja
Priority claimed from JP19768189A external-priority patent/JP2654190B2/ja
Priority claimed from JP19768289A external-priority patent/JP2654191B2/ja
Priority claimed from JP1200847A external-priority patent/JP2808703B2/ja
Application filed by Nitto Denko Corp filed Critical Nitto Denko Corp
Publication of SG49842A1 publication Critical patent/SG49842A1/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • H05K1/112Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113Via provided in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63Vias, e.g. via plugs
    • H10W70/635Through-vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0137Materials
    • H05K2201/0154Polyimide
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0388Other aspects of conductors
    • H05K2201/0394Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/09563Metal filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0979Redundant conductors or connections, i.e. more than one current path between two points
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits
    • H05K3/363Assembling flexible printed circuits with other printed circuits by soldering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/072Connecting or disconnecting of bump connectors
    • H10W72/07251Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
SG1996007397A 1988-11-09 1989-11-07 Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor SG49842A1 (en)

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
JP28320788A JPH0760840B2 (ja) 1988-11-09 1988-11-09 配線基板およびその製法
JP1050793A JP2785832B2 (ja) 1989-03-01 1989-03-01 半導体装置の実装構造
JP1050792A JP2815113B2 (ja) 1989-03-01 1989-03-01 フィルムキャリアおよび半導体装置の製造方法
JP1181272A JP2634672B2 (ja) 1989-07-13 1989-07-13 半導体装置
JP1197680A JP2654189B2 (ja) 1989-07-28 1989-07-28 半導体装置の実装方法
JP19768189A JP2654190B2 (ja) 1989-07-28 1989-07-28 半導体装置の実装方法
JP19768289A JP2654191B2 (ja) 1989-07-28 1989-07-28 半導体装置の実装方法
JP1200847A JP2808703B2 (ja) 1989-08-02 1989-08-02 フィルムキャリアおよび半導体装置

Publications (1)

Publication Number Publication Date
SG49842A1 true SG49842A1 (en) 1998-06-15

Family

ID=27572395

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1996007397A SG49842A1 (en) 1988-11-09 1989-11-07 Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor

Country Status (5)

Country Link
US (1) US5072289A (fr)
EP (1) EP0368262B1 (fr)
KR (1) KR960006763B1 (fr)
DE (1) DE68929282T2 (fr)
SG (1) SG49842A1 (fr)

Families Citing this family (77)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5634267A (en) * 1991-06-04 1997-06-03 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
US5640762A (en) 1988-09-30 1997-06-24 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
US4954878A (en) * 1989-06-29 1990-09-04 Digital Equipment Corp. Method of packaging and powering integrated circuit chips and the chip assembly formed thereby
JP3154713B2 (ja) * 1990-03-16 2001-04-09 株式会社リコー 異方性導電膜およびその製造方法
DE69216658T2 (de) * 1991-02-25 1997-08-07 Canon Kk Vorrichtung und Verfahren zur Verbindung elektrischer Bauelemente
DE69233088T2 (de) * 1991-02-25 2003-12-24 Canon K.K., Tokio/Tokyo Elektrisches Verbindungsteil und sein Herstellungsverfahren
JPH04301817A (ja) * 1991-03-29 1992-10-26 Rohm Co Ltd 液晶表示装置とその製造方法
US6219908B1 (en) 1991-06-04 2001-04-24 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
US5678301A (en) * 1991-06-04 1997-10-21 Micron Technology, Inc. Method for forming an interconnect for testing unpackaged semiconductor dice
US5578934A (en) * 1991-06-04 1996-11-26 Micron Technology, Inc. Method and apparatus for testing unpackaged semiconductor dice
US5302891A (en) * 1991-06-04 1994-04-12 Micron Technology, Inc. Discrete die burn-in for non-packaged die
US6340894B1 (en) 1991-06-04 2002-01-22 Micron Technology, Inc. Semiconductor testing apparatus including substrate with contact members and conductive polymer interconnect
US5487999A (en) * 1991-06-04 1996-01-30 Micron Technology, Inc. Method for fabricating a penetration limited contact having a rough textured surface
US5559444A (en) * 1991-06-04 1996-09-24 Micron Technology, Inc. Method and apparatus for testing unpackaged semiconductor dice
US5716218A (en) * 1991-06-04 1998-02-10 Micron Technology, Inc. Process for manufacturing an interconnect for testing a semiconductor die
US6998860B1 (en) 1991-06-04 2006-02-14 Micron Technology, Inc. Method for burn-in testing semiconductor dice
US5252850A (en) * 1992-01-27 1993-10-12 Photometrics Ltd. Apparatus for contouring a semiconductor, light responsive array with a prescribed physical profile
US5355019A (en) * 1992-03-04 1994-10-11 At&T Bell Laboratories Devices with tape automated bonding
US5751059A (en) * 1992-06-19 1998-05-12 Thomson-Csf Semiconducteurs Specifiques Pyroelectric sensor
US5596172A (en) * 1993-05-07 1997-01-21 Motorola, Inc. Planar encapsulation process
GB9318573D0 (en) * 1993-09-08 1993-10-27 Deas Alexander R Bonding process for producing multiple simultaneous connections between silicon di and a substrate
US5548091A (en) * 1993-10-26 1996-08-20 Tessera, Inc. Semiconductor chip connection components with adhesives and methods for bonding to the chip
US5434452A (en) * 1993-11-01 1995-07-18 Motorola, Inc. Z-axis compliant mechanical IC wiring substrate and method for making the same
US5734201A (en) * 1993-11-09 1998-03-31 Motorola, Inc. Low profile semiconductor device with like-sized chip and mounting substrate
US5454160A (en) * 1993-12-03 1995-10-03 Ncr Corporation Apparatus and method for stacking integrated circuit devices
US5455390A (en) * 1994-02-01 1995-10-03 Tessera, Inc. Microelectronics unit mounting with multiple lead bonding
US5917229A (en) * 1994-02-08 1999-06-29 Prolinx Labs Corporation Programmable/reprogrammable printed circuit board using fuse and/or antifuse as interconnect
JP2833996B2 (ja) * 1994-05-25 1998-12-09 日本電気株式会社 フレキシブルフィルム及びこれを有する半導体装置
US5476818A (en) * 1994-08-19 1995-12-19 Motorola, Inc. Semiconductor structure and method of manufacture
US5513430A (en) * 1994-08-19 1996-05-07 Motorola, Inc. Method for manufacturing a probe
US5962815A (en) 1995-01-18 1999-10-05 Prolinx Labs Corporation Antifuse interconnect between two conducting layers of a printed circuit board
KR100218996B1 (ko) * 1995-03-24 1999-09-01 모기 쥰이찌 반도체장치
JP3015712B2 (ja) * 1995-06-30 2000-03-06 日東電工株式会社 フィルムキャリアおよびそれを用いてなる半導体装置
WO1997011591A1 (fr) * 1995-09-22 1997-03-27 Minnesota Mining And Manufacturing Company Circuits flexibles a plot de contact d'interconnexion
US5886877A (en) * 1995-10-13 1999-03-23 Meiko Electronics Co., Ltd. Circuit board, manufacturing method therefor, and bump-type contact head and semiconductor component packaging module using the circuit board
KR100201383B1 (ko) * 1995-10-19 1999-06-15 구본준 인터페이스 조립체를 구비한 유에프비지에이 패키지
JP2736042B2 (ja) * 1995-12-12 1998-04-02 山一電機株式会社 回路基板
WO1997027490A1 (fr) * 1996-01-25 1997-07-31 General Dynamics Information Systems, Inc. Execution d'une operation sur un circuit integre
US5756370A (en) * 1996-02-08 1998-05-26 Micron Technology, Inc. Compliant contact system with alignment structure for testing unpackaged semiconductor dice
US6460245B1 (en) 1996-03-07 2002-10-08 Tessera, Inc. Method of fabricating semiconductor chip assemblies
US5789271A (en) * 1996-03-18 1998-08-04 Micron Technology, Inc. Method for fabricating microbump interconnect for bare semiconductor dice
US5726075A (en) * 1996-03-29 1998-03-10 Micron Technology, Inc. Method for fabricating microbump interconnect for bare semiconductor dice
US5808360A (en) * 1996-05-15 1998-09-15 Micron Technology, Inc. Microbump interconnect for bore semiconductor dice
US5789278A (en) * 1996-07-30 1998-08-04 Micron Technology, Inc. Method for fabricating chip modules
JP3284262B2 (ja) * 1996-09-05 2002-05-20 セイコーエプソン株式会社 液晶表示装置及びそれを用いた電子機器
US5989935A (en) * 1996-11-19 1999-11-23 Texas Instruments Incorporated Column grid array for semiconductor packaging and method
US6133072A (en) 1996-12-13 2000-10-17 Tessera, Inc. Microelectronic connector with planar elastomer sockets
US5910354A (en) * 1997-03-04 1999-06-08 W.L. Gore & Associates, Inc. Metallurgical interconnect composite
US6025731A (en) 1997-03-21 2000-02-15 Micron Technology, Inc. Hybrid interconnect and system for testing semiconductor dice
US6016060A (en) * 1997-03-25 2000-01-18 Micron Technology, Inc. Method, apparatus and system for testing bumped semiconductor components
US5962921A (en) * 1997-03-31 1999-10-05 Micron Technology, Inc. Interconnect having recessed contact members with penetrating blades for testing semiconductor dice and packages with contact bumps
US5931685A (en) * 1997-06-02 1999-08-03 Micron Technology, Inc. Interconnect for making temporary electrical connections with bumped semiconductor components
EP1025587A4 (fr) 1997-07-21 2000-10-04 Aguila Technologies Inc Boitier de puce de semiconducteur a bosses et son procede de fabrication
EP1895586A3 (fr) 1997-10-17 2013-04-03 Ibiden Co., Ltd. Substrat pour un boîtier semi-conducteur
JP2000106482A (ja) * 1998-07-29 2000-04-11 Sony Chem Corp フレキシブル基板製造方法
DE19912240A1 (de) * 1999-03-18 2000-09-28 Siemens Ag Bauelement und Verfahren zur Herstellung des Bauelementes
US6263566B1 (en) 1999-05-03 2001-07-24 Micron Technology, Inc. Flexible semiconductor interconnect fabricated by backslide thinning
JP3973340B2 (ja) * 1999-10-05 2007-09-12 Necエレクトロニクス株式会社 半導体装置、配線基板、及び、それらの製造方法
WO2003105213A2 (fr) * 2002-06-07 2003-12-18 Koninklijke Philips Electronics N.V. Procede de fabrication d'un dispositif electronique
JP3935091B2 (ja) * 2003-02-27 2007-06-20 浜松ホトニクス株式会社 半導体装置、及びそれを用いた放射線検出器
US7658994B2 (en) * 2003-12-30 2010-02-09 3M Innovative Properties Company Substrates and compounds bonded thereto
TWI255466B (en) * 2004-10-08 2006-05-21 Ind Tech Res Inst Polymer-matrix conductive film and method for fabricating the same
US20070103412A1 (en) * 2005-11-09 2007-05-10 Pao-Yun Tang Liquid crystal display having a voltage divider with a thermistor
JP5425404B2 (ja) * 2008-01-18 2014-02-26 東京エレクトロン株式会社 アモルファスカーボン膜の処理方法およびそれを用いた半導体装置の製造方法
JP5712615B2 (ja) * 2008-11-25 2015-05-07 住友ベークライト株式会社 電子部品パッケージおよび電子部品パッケージの製造方法
US8198131B2 (en) * 2009-11-18 2012-06-12 Advanced Semiconductor Engineering, Inc. Stackable semiconductor device packages
TWI408785B (zh) 2009-12-31 2013-09-11 日月光半導體製造股份有限公司 半導體封裝結構
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI419283B (zh) 2010-02-10 2013-12-11 日月光半導體製造股份有限公司 封裝結構
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8278746B2 (en) 2010-04-02 2012-10-02 Advanced Semiconductor Engineering, Inc. Semiconductor device packages including connecting elements
US8624374B2 (en) 2010-04-02 2014-01-07 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof
DK2592915T3 (da) * 2010-07-06 2022-04-19 Fujikura Ltd Fremstillingsfremgangsmåde til lamineret printplade
TWI451546B (zh) 2010-10-29 2014-09-01 日月光半導體製造股份有限公司 堆疊式封裝結構、其封裝結構及封裝結構之製造方法
US9171792B2 (en) 2011-02-28 2015-10-27 Advanced Semiconductor Engineering, Inc. Semiconductor device packages having a side-by-side device arrangement and stacking functionality
CN103402309B (zh) * 2013-07-31 2016-05-04 无锡市伟丰印刷机械厂 一种具有垂直支撑结构的印刷电路板弹性焊盘
CN112533554B (zh) * 2020-04-02 2023-09-22 深圳市予一电子科技有限公司 一种脱毛仪以及半导体制冷片

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3868724A (en) * 1973-11-21 1975-02-25 Fairchild Camera Instr Co Multi-layer connecting structures for packaging semiconductor devices mounted on a flexible carrier
JPS6148952A (ja) * 1984-08-16 1986-03-10 Toshiba Corp 半導体装置
JPS61111561A (ja) * 1984-10-05 1986-05-29 Fujitsu Ltd 半導体装置
FR2584235B1 (fr) * 1985-06-26 1988-04-22 Bull Sa Procede de montage d'un circuit integre sur un support, dispositif en resultant et son application a une carte a microcircuits electroniques
US4926241A (en) * 1988-02-19 1990-05-15 Microelectronics And Computer Technology Corporation Flip substrate for chip mount

Also Published As

Publication number Publication date
EP0368262B1 (fr) 2001-02-14
KR960006763B1 (ko) 1996-05-23
DE68929282T2 (de) 2001-06-07
KR900008918A (ko) 1990-06-03
EP0368262A2 (fr) 1990-05-16
US5072289A (en) 1991-12-10
DE68929282D1 (de) 2001-03-22
EP0368262A3 (fr) 1990-11-28

Similar Documents

Publication Publication Date Title
SG49842A1 (en) Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor
EP0343400A3 (en) Electronic device package with flexible carrier
EP0335383A3 (en) Semiconductor device having a metallization film layer semiconductor device having a metallization film layer
DE69212185D1 (de) Halbleiteraufbau mit flexibler Trägerfolie
EP0196747A3 (en) Substrate structure for a semiconductor device
EP0463545A3 (en) Substrate bias generator for semiconductor devices
DE68928087D1 (de) Substratsstruktur für zusammengesetztes Halbleiterbauelement
EP0301565A3 (en) Semiconductor device comprising a wiring layer
EP0493025A3 (en) An active matrix substrate inspecting device
EP0448316A3 (en) Substrate holding device
GB2224669B (en) Organic semiconductor thin films
GB8803924D0 (en) Semiconductor devices
EP0367292A3 (en) Compound semiconductor substrate
DE69219509D1 (de) Halbleiteranordnung mit Substrat
EP0483868A3 (en) Semiconductor device having reflecting layer
EP0414204A3 (en) Multilayer interconnection substrate and semiconductor integrated circuit device using the same
GB2248346B (en) Multiple layer semiconductor circuit module
GB2215125B (en) Semiconductor device
EP0450228A3 (en) Semiconductor device formed on a silicon substrate or a silicon layer
TW335216U (en) Film semiconductor device
EP0425244A3 (en) Semiconductor device having a heteroepitaxial substrate
EP0334759A3 (en) Semiconductor device
GB8819949D0 (en) Semiconductor devices
EP0346120A3 (en) Semiconductor device
EP0415526A3 (en) Semiconductor device having wiring layers