SG84568A1 - Flip chip bump bonding - Google Patents

Flip chip bump bonding

Info

Publication number
SG84568A1
SG84568A1 SG200000865A SG200000865A SG84568A1 SG 84568 A1 SG84568 A1 SG 84568A1 SG 200000865 A SG200000865 A SG 200000865A SG 200000865 A SG200000865 A SG 200000865A SG 84568 A1 SG84568 A1 SG 84568A1
Authority
SG
Singapore
Prior art keywords
photoresist
ubm
capping layer
chip
solder
Prior art date
Application number
SG200000865A
Other languages
English (en)
Inventor
Degani Yinon
Paul Kossives Dean
Original Assignee
Lucent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lucent Technologies Inc filed Critical Lucent Technologies Inc
Publication of SG84568A1 publication Critical patent/SG84568A1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
SG200000865A 1999-02-23 2000-02-17 Flip chip bump bonding SG84568A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/256,443 US6232212B1 (en) 1999-02-23 1999-02-23 Flip chip bump bonding

Publications (1)

Publication Number Publication Date
SG84568A1 true SG84568A1 (en) 2001-11-20

Family

ID=22972258

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200000865A SG84568A1 (en) 1999-02-23 2000-02-17 Flip chip bump bonding

Country Status (6)

Country Link
US (1) US6232212B1 (de)
EP (1) EP1032030B1 (de)
JP (1) JP3588027B2 (de)
KR (1) KR100712772B1 (de)
SG (1) SG84568A1 (de)
TW (1) TW445554B (de)

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TW556329B (en) * 1999-02-26 2003-10-01 Hitachi Ltd Wiring board, its production method, semiconductor device and its production method
JP3287328B2 (ja) 1999-03-09 2002-06-04 日本電気株式会社 半導体装置及び半導体装置の製造方法
US6861345B2 (en) * 1999-08-27 2005-03-01 Micron Technology, Inc. Method of disposing conductive bumps onto a semiconductor device
US6570251B1 (en) * 1999-09-02 2003-05-27 Micron Technology, Inc. Under bump metalization pad and solder bump connections
KR100311975B1 (ko) * 1999-12-16 2001-10-17 윤종용 반도체소자 및 그 제조방법
EP1990832A3 (de) 2000-02-25 2010-09-29 Ibiden Co., Ltd. Mehrschichtige Leiterplatte und Herstellungsverfahren für mehrschichtige Leiterplatte
TW459362B (en) * 2000-08-01 2001-10-11 Siliconware Precision Industries Co Ltd Bump structure to improve the smoothness
WO2002027786A1 (en) 2000-09-25 2002-04-04 Ibiden Co., Ltd. Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
US6759319B2 (en) * 2001-05-17 2004-07-06 Institute Of Microelectronics Residue-free solder bumping process
US6624521B2 (en) 2001-07-20 2003-09-23 Georgia Tech Research Corp. Flip chip design on a coplanar waveguide with a pseudo-coaxial ground bump configuration
KR100426897B1 (ko) * 2001-08-21 2004-04-30 주식회사 네패스 솔더 터미널 및 그 제조방법
US6740427B2 (en) * 2001-09-21 2004-05-25 Intel Corporation Thermo-mechanically robust C4 ball-limiting metallurgy to prevent failure due to die-package interaction and method of making same
US6853076B2 (en) * 2001-09-21 2005-02-08 Intel Corporation Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same
DE60217251T2 (de) * 2001-10-10 2007-07-12 Rohm And Haas Co. Verbessertes Verfahren zur Herstellung von Lithiumborohydrid
TW521406B (en) * 2002-01-07 2003-02-21 Advanced Semiconductor Eng Method for forming bump
US6756294B1 (en) 2002-01-30 2004-06-29 Taiwan Semiconductor Manufacturing Company Method for improving bump reliability for flip chip devices
TW530402B (en) * 2002-03-01 2003-05-01 Advanced Semiconductor Eng Bump process
US7727777B2 (en) * 2002-05-31 2010-06-01 Ebrahim Andideh Forming ferroelectric polymer memories
US6897141B2 (en) * 2002-10-23 2005-05-24 Ocube Digital Co., Ltd. Solder terminal and fabricating method thereof
DE10250778B3 (de) 2002-10-30 2004-03-04 Infineon Technologies Ag Elektronisches Bauteil mit einem Halbleiterchip und Verfahren zum Bestücken eines Schaltungsträgers beim Herstellen des elektronischen Bauteils
TWI236093B (en) * 2002-12-30 2005-07-11 Advanced Semiconductor Eng Bumping process
US20040241906A1 (en) * 2003-05-28 2004-12-02 Vincent Chan Integrated circuit package and method for making same that employs under bump metalization layer
TWI221323B (en) * 2003-06-30 2004-09-21 Advanced Semiconductor Eng Bumping process
TWI229436B (en) * 2003-07-10 2005-03-11 Advanced Semiconductor Eng Wafer structure and bumping process
KR100541396B1 (ko) 2003-10-22 2006-01-11 삼성전자주식회사 3차원 ｕｂｍ을 포함하는 솔더 범프 구조의 형성 방법
US20050167837A1 (en) * 2004-01-21 2005-08-04 International Business Machines Corporation Device with area array pads for test probing
TWI254995B (en) * 2004-01-30 2006-05-11 Phoenix Prec Technology Corp Presolder structure formed on semiconductor package substrate and method for fabricating the same
US20060160267A1 (en) * 2005-01-14 2006-07-20 Stats Chippac Ltd. Under bump metallurgy in integrated circuits
US20060205200A1 (en) * 2005-03-08 2006-09-14 Dominick Richiuso Low capacitance solder bump interface structure
US7381634B2 (en) * 2005-04-13 2008-06-03 Stats Chippac Ltd. Integrated circuit system for bonding
JP4671844B2 (ja) * 2005-05-27 2011-04-20 株式会社日立産機システム ブロワ
US20070048991A1 (en) * 2005-08-23 2007-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Copper interconnect structures and fabrication method thereof
KR100790447B1 (ko) * 2006-06-30 2008-01-02 주식회사 하이닉스반도체 플립 칩 본딩 패키지의 범프 형성방법
TWI419242B (zh) * 2007-02-05 2013-12-11 南茂科技股份有限公司 具有加強物的凸塊結構及其製造方法
US7767586B2 (en) * 2007-10-29 2010-08-03 Applied Materials, Inc. Methods for forming connective elements on integrated circuits for packaging applications
US8492892B2 (en) * 2010-12-08 2013-07-23 International Business Machines Corporation Solder bump connections
JP5928366B2 (ja) * 2013-02-13 2016-06-01 豊田合成株式会社 Ｉｉｉ族窒化物半導体の製造方法
US20150072515A1 (en) * 2013-09-09 2015-03-12 Rajendra C. Dias Laser ablation method and recipe for sacrificial material patterning and removal
TW201602715A (zh) * 2014-07-07 2016-01-16 日立麥克賽爾股份有限公司 配列用遮罩及其製造方法
US10418540B2 (en) 2017-11-28 2019-09-17 International Business Machines Corporation Adjustment of qubit frequency through annealing
US10170681B1 (en) 2017-11-28 2019-01-01 International Business Machines Corporation Laser annealing of qubits with structured illumination
US10355193B2 (en) 2017-11-28 2019-07-16 International Business Machines Corporation Flip chip integration on qubit chips
US10340438B2 (en) 2017-11-28 2019-07-02 International Business Machines Corporation Laser annealing qubits for optimized frequency allocation
US11895931B2 (en) 2017-11-28 2024-02-06 International Business Machines Corporation Frequency tuning of multi-qubit systems
KR102624169B1 (ko) * 2019-06-24 2024-01-12 삼성전자주식회사 반도체 소자 및 이를 포함하는 반도체 패키지
US11302537B2 (en) 2020-04-01 2022-04-12 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure with conductive adhesive layer and method for forming the same
CN113540017B (zh) * 2021-06-30 2024-04-09 佛山市国星光电股份有限公司 一种igbt模块封装结构及其制作方法

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US5137845A (en) * 1990-07-31 1992-08-11 International Business Machines Corporation Method of forming metal contact pads and terminals on semiconductor chips
US5767010A (en) * 1995-03-20 1998-06-16 Mcnc Solder bump fabrication methods and structure including a titanium barrier layer
US5885891A (en) * 1996-07-17 1999-03-23 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5937320A (en) * 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints

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US5137845A (en) * 1990-07-31 1992-08-11 International Business Machines Corporation Method of forming metal contact pads and terminals on semiconductor chips
US5767010A (en) * 1995-03-20 1998-06-16 Mcnc Solder bump fabrication methods and structure including a titanium barrier layer
US5885891A (en) * 1996-07-17 1999-03-23 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5937320A (en) * 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints

Also Published As

Publication number Publication date
KR100712772B1 (ko) 2007-04-30
JP2000243777A (ja) 2000-09-08
KR20000071360A (ko) 2000-11-25
EP1032030B1 (de) 2011-06-22
EP1032030A3 (de) 2002-01-02
EP1032030A2 (de) 2000-08-30
JP3588027B2 (ja) 2004-11-10
US6232212B1 (en) 2001-05-15
TW445554B (en) 2001-07-11

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