TW200419765A - Semiconductor multi-package module having wire bond interconnection between stacked packages - Google Patents
Semiconductor multi-package module having wire bond interconnection between stacked packagesInfo
- Publication number
- TW200419765A TW200419765A TW092125625A TW92125625A TW200419765A TW 200419765 A TW200419765 A TW 200419765A TW 092125625 A TW092125625 A TW 092125625A TW 92125625 A TW92125625 A TW 92125625A TW 200419765 A TW200419765 A TW 200419765A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor multi
- package module
- wire bond
- stacked packages
- package
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W42/00—Arrangements for protection of devices
- H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/015—Manufacture or treatment of bond wires
- H10W72/01515—Forming coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/877—Bump connectors and die-attach connectors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/28—Configurations of stacked chips the stacked chips having different sizes, e.g. chip stacks having a pyramidal shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/20—Configurations of stacked chips
- H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/752—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
A semiconductor multi-package module having stacked lower and upper packages, each package including a die attached to a substrate, in which the upper and lower substrates are interconnected by wire bonding. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US41159002P | 2002-09-17 | 2002-09-17 | |
| US10/632,549 US7064426B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having wire bond interconnect between stacked packages |
| US10/632,552 US20040061213A1 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages |
| US10/632,550 US6972481B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages |
| US10/632,568 US7205647B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages |
| US10/632,551 US6838761B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield |
| US10/632,553 US7053476B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200419765A true TW200419765A (en) | 2004-10-01 |
| TWI329918B TWI329918B (en) | 2010-09-01 |
Family
ID=32034538
Family Applications (3)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW092125625A TWI329918B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
| TW100113640A TWI469301B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module with wire contact interconnection in stacked package |
| TW098139252A TWI378548B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
Family Applications After (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW100113640A TWI469301B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module with wire contact interconnection in stacked package |
| TW098139252A TWI378548B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
Country Status (6)
| Country | Link |
|---|---|
| EP (1) | EP1547141A4 (en) |
| JP (3) | JP4800625B2 (en) |
| KR (1) | KR101166575B1 (en) |
| AU (1) | AU2003272405A1 (en) |
| TW (3) | TWI329918B (en) |
| WO (1) | WO2004027823A2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI650840B (en) * | 2014-07-09 | 2019-02-11 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
Families Citing this family (29)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3858854B2 (en) * | 2003-06-24 | 2006-12-20 | 富士通株式会社 | Multilayer semiconductor device |
| US7364945B2 (en) | 2005-03-31 | 2008-04-29 | Stats Chippac Ltd. | Method of mounting an integrated circuit package in an encapsulant cavity |
| KR101213661B1 (en) * | 2005-03-31 | 2012-12-17 | 스태츠 칩팩, 엘티디. | Semiconductor assembly including chip scale package and second substrate and having exposed substrate surfaces on upper and lower sides |
| US7394148B2 (en) | 2005-06-20 | 2008-07-01 | Stats Chippac Ltd. | Module having stacked chip scale semiconductor packages |
| SG130055A1 (en) | 2005-08-19 | 2007-03-20 | Micron Technology Inc | Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices |
| SG130066A1 (en) | 2005-08-26 | 2007-03-20 | Micron Technology Inc | Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices |
| JP5522561B2 (en) * | 2005-08-31 | 2014-06-18 | マイクロン テクノロジー, インク. | Microelectronic device package, stacked microelectronic device package, and method of manufacturing microelectronic device |
| US8198735B2 (en) | 2006-12-31 | 2012-06-12 | Stats Chippac Ltd. | Integrated circuit package with molded cavity |
| US8124451B2 (en) | 2007-09-21 | 2012-02-28 | Stats Chippac Ltd. | Integrated circuit packaging system with interposer |
| KR20110124065A (en) | 2010-05-10 | 2011-11-16 | 하나 마이크론(주) | Stacked Semiconductor Packages |
| KR20110124063A (en) * | 2010-05-10 | 2011-11-16 | 하나 마이크론(주) | Stacked Semiconductor Packages |
| KR101688005B1 (en) * | 2010-05-10 | 2016-12-20 | 삼성전자주식회사 | Semiconductor package having dual land and related device |
| TWI406377B (en) * | 2010-12-27 | 2013-08-21 | 力成科技股份有限公司 | Stereoscopic frame array structure with directional indication mark and manufacturing method thereof |
| US9165906B2 (en) | 2012-12-10 | 2015-10-20 | Invensas Corporation | High performance package on package |
| JP6128993B2 (en) | 2013-06-28 | 2017-05-17 | キヤノン株式会社 | Multilayer semiconductor device, printed circuit board, electronic device, and method of manufacturing multilayer semiconductor device |
| KR101563910B1 (en) * | 2013-10-24 | 2015-10-28 | 앰코 테크놀로지 코리아 주식회사 | EMI shielding device for semiconductor package and method for manufacturing the same |
| WO2015065639A1 (en) * | 2013-10-30 | 2015-05-07 | Honeywell International Inc. | Force sensor with gap-controlled over-force protection |
| US9666730B2 (en) * | 2014-08-18 | 2017-05-30 | Optiz, Inc. | Wire bond sensor package |
| KR101961377B1 (en) * | 2015-07-31 | 2019-03-22 | 송영희 | Land Grid Array semiconductor package |
| KR101799668B1 (en) * | 2016-04-07 | 2017-11-20 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and manufacturing method thereof |
| KR102652721B1 (en) * | 2016-12-30 | 2024-03-28 | 인텔 코포레이션 | Microelectronic devices designed as 3D stacked ultra-thin package modules for high-frequency communications |
| EP3644351A1 (en) * | 2018-10-26 | 2020-04-29 | Nagravision SA | Protection of wire-bond ball grid array packaged integrated circuit chips |
| KR102283390B1 (en) | 2019-10-07 | 2021-07-29 | 제엠제코(주) | Semiconductor package for multi chip and method of fabricating the same |
| KR102325217B1 (en) | 2020-05-18 | 2021-11-11 | 제엠제코(주) | Multi die stack semiconductor package |
| CN114361063B (en) * | 2021-11-24 | 2024-12-13 | 苏州科阳半导体有限公司 | Substrate bonding method and substrate |
| US20240006278A1 (en) * | 2022-07-01 | 2024-01-04 | Mediatek Inc. | Multi-die qfn hybrid package |
| US12469765B2 (en) | 2022-09-22 | 2025-11-11 | Apple Inc. | Thermally enhanced chip-on-wafer or wafer-on-wafer bonding |
| CN115410929B (en) * | 2022-10-09 | 2024-09-24 | 江苏华创微系统有限公司 | Method for preparing stacked structure of flip chip and bottom chip |
| CN120610067A (en) * | 2025-04-02 | 2025-09-09 | 杭州广立测试设备有限公司 | Wafer capacitance testing method, device and electronic equipment |
Family Cites Families (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5222014A (en) * | 1992-03-02 | 1993-06-22 | Motorola, Inc. | Three-dimensional multi-chip pad array carrier |
| JPH05283608A (en) * | 1992-03-31 | 1993-10-29 | Toshiba Corp | Resin-sealed semiconductor device and manufacture thereof |
| US5247423A (en) * | 1992-05-26 | 1993-09-21 | Motorola, Inc. | Stacking three dimensional leadless multi-chip module and method for making the same |
| FR2694840B1 (en) * | 1992-08-13 | 1994-09-09 | Commissariat Energie Atomique | Three-dimensional multi-chip module. |
| US5436203A (en) * | 1994-07-05 | 1995-07-25 | Motorola, Inc. | Shielded liquid encapsulated semiconductor device and method for making the same |
| US5652185A (en) * | 1995-04-07 | 1997-07-29 | National Semiconductor Corporation | Maximized substrate design for grid array based assemblies |
| US6075289A (en) * | 1996-10-24 | 2000-06-13 | Tessera, Inc. | Thermally enhanced packaged semiconductor assemblies |
| JP3644662B2 (en) | 1997-10-29 | 2005-05-11 | 株式会社ルネサステクノロジ | Semiconductor module |
| JPH11243175A (en) * | 1998-02-25 | 1999-09-07 | Rohm Co Ltd | Composite semiconductor device |
| JPH11265975A (en) * | 1998-03-17 | 1999-09-28 | Mitsubishi Electric Corp | Multilayer integrated circuit device |
| JP2000058691A (en) * | 1998-08-07 | 2000-02-25 | Sharp Corp | Millimeter-wave semiconductor device |
| US6201302B1 (en) * | 1998-12-31 | 2001-03-13 | Sampo Semiconductor Corporation | Semiconductor package having multi-dies |
| JP2000269411A (en) * | 1999-03-17 | 2000-09-29 | Shinko Electric Ind Co Ltd | Semiconductor device and manufacturing method thereof |
| JP4075204B2 (en) * | 1999-04-09 | 2008-04-16 | 松下電器産業株式会社 | Multilayer semiconductor device |
| JP4284744B2 (en) * | 1999-04-13 | 2009-06-24 | ソニー株式会社 | High frequency integrated circuit device |
| JP2000340736A (en) * | 1999-05-26 | 2000-12-08 | Sony Corp | Semiconductor device, mounting structure thereof, and manufacturing method thereof |
| JP2001127246A (en) * | 1999-10-29 | 2001-05-11 | Fujitsu Ltd | Semiconductor device |
| JP2001223326A (en) * | 2000-02-09 | 2001-08-17 | Hitachi Ltd | Semiconductor device |
| JP2001358280A (en) * | 2000-04-12 | 2001-12-26 | Sony Corp | Lead frame, method of manufacturing the same, semiconductor integrated circuit device, and method of manufacturing the same |
| JP3916854B2 (en) * | 2000-06-28 | 2007-05-23 | シャープ株式会社 | Wiring board, semiconductor device, and package stack semiconductor device |
| JP2002040095A (en) * | 2000-07-26 | 2002-02-06 | Nec Corp | Semiconductor device and mounting method thereof |
| JP4570809B2 (en) | 2000-09-04 | 2010-10-27 | 富士通セミコンダクター株式会社 | Multilayer semiconductor device and manufacturing method thereof |
| JP2002158326A (en) * | 2000-11-08 | 2002-05-31 | Apack Technologies Inc | Semiconductor device and manufacturing method |
| JP3798620B2 (en) * | 2000-12-04 | 2006-07-19 | 富士通株式会社 | Manufacturing method of semiconductor device |
| US6340846B1 (en) * | 2000-12-06 | 2002-01-22 | Amkor Technology, Inc. | Making semiconductor packages with stacked dies and reinforced wire bonds |
| JP2002184936A (en) * | 2000-12-11 | 2002-06-28 | Matsushita Electric Ind Co Ltd | Semiconductor device and method of manufacturing the same |
| JP2002217354A (en) * | 2001-01-15 | 2002-08-02 | Shinko Electric Ind Co Ltd | Semiconductor device |
-
2003
- 2003-09-15 KR KR1020057004551A patent/KR101166575B1/en not_active Expired - Fee Related
- 2003-09-15 JP JP2004568930A patent/JP4800625B2/en not_active Expired - Fee Related
- 2003-09-15 WO PCT/US2003/028919 patent/WO2004027823A2/en not_active Ceased
- 2003-09-15 AU AU2003272405A patent/AU2003272405A1/en not_active Abandoned
- 2003-09-15 EP EP03754585A patent/EP1547141A4/en not_active Ceased
- 2003-09-17 TW TW092125625A patent/TWI329918B/en not_active IP Right Cessation
- 2003-09-17 TW TW100113640A patent/TWI469301B/en not_active IP Right Cessation
- 2003-09-17 TW TW098139252A patent/TWI378548B/en not_active IP Right Cessation
-
2011
- 2011-06-21 JP JP2011137096A patent/JP5602685B2/en not_active Expired - Fee Related
-
2013
- 2013-06-12 JP JP2013123601A patent/JP5856103B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI650840B (en) * | 2014-07-09 | 2019-02-11 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201017853A (en) | 2010-05-01 |
| JP2005539403A (en) | 2005-12-22 |
| AU2003272405A1 (en) | 2004-04-08 |
| JP2013211589A (en) | 2013-10-10 |
| KR101166575B1 (en) | 2012-07-18 |
| TWI378548B (en) | 2012-12-01 |
| TWI469301B (en) | 2015-01-11 |
| TW201131731A (en) | 2011-09-16 |
| EP1547141A4 (en) | 2010-02-24 |
| JP2011181971A (en) | 2011-09-15 |
| JP5602685B2 (en) | 2014-10-08 |
| KR20050044925A (en) | 2005-05-13 |
| WO2004027823A2 (en) | 2004-04-01 |
| JP5856103B2 (en) | 2016-02-09 |
| JP4800625B2 (en) | 2011-10-26 |
| EP1547141A2 (en) | 2005-06-29 |
| WO2004027823A3 (en) | 2004-05-21 |
| TWI329918B (en) | 2010-09-01 |
| AU2003272405A8 (en) | 2004-04-08 |
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