TW202619476A - 半導體結構及其製造方法 - Google Patents

半導體結構及其製造方法

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Publication number
TW202619476A
TW202619476A TW113140192A TW113140192A TW202619476A TW 202619476 A TW202619476 A TW 202619476A TW 113140192 A TW113140192 A TW 113140192A TW 113140192 A TW113140192 A TW 113140192A TW 202619476 A TW202619476 A TW 202619476A
Authority
TW
Taiwan
Prior art keywords
substrate
disposed
isolation structure
semiconductor structure
memory device
Prior art date
Application number
TW113140192A
Other languages
English (en)
Other versions
TWI912977B (zh
Inventor
陳侑廷
尤碩廷
朱玄通
張維哲
Original Assignee
華邦電子股份有限公司
Filing date
Publication date
Application filed by 華邦電子股份有限公司 filed Critical 華邦電子股份有限公司
Priority to TW113140192A priority Critical patent/TWI912977B/zh
Priority claimed from TW113140192A external-priority patent/TWI912977B/zh
Priority to US18/976,361 priority patent/US20260113924A1/en
Priority to CN202510050928.9A priority patent/CN121941045A/zh
Application granted granted Critical
Publication of TWI912977B publication Critical patent/TWI912977B/zh
Publication of TW202619476A publication Critical patent/TW202619476A/zh

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Abstract

一種半導體結構及其製造方法。所述半導體結構包括基底、第一隔離結構、第二隔離結構、字元線、墊層、覆蓋層以及虛設圖案。所述基底具有記憶元件區與周邊區。所述第一隔離結構設置於所述記憶元件區中的所述基底中,以界定出主動區。所述第二隔離結構設置於所述周邊區中的所述基底中。所述字元線設置於所述主動區中的所述基底中。所述墊層設置於所述記憶元件區中的所述基底上。所述覆蓋層設置於所述墊層上,且向下延伸至所述字元線的頂面。所述虛設圖案設置於所述第二隔離結構中。
TW113140192A 2024-10-22 2024-10-22 半導體結構及其製造方法 TWI912977B (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW113140192A TWI912977B (zh) 2024-10-22 2024-10-22 半導體結構及其製造方法
US18/976,361 US20260113924A1 (en) 2024-10-22 2024-12-11 Semiconductor structure and manufacturing method thereof
CN202510050928.9A CN121941045A (zh) 2024-10-22 2025-01-13 半导体结构及其制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW113140192A TWI912977B (zh) 2024-10-22 2024-10-22 半導體結構及其製造方法

Publications (2)

Publication Number Publication Date
TWI912977B TWI912977B (zh) 2026-01-21
TW202619476A true TW202619476A (zh) 2026-05-01

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ID=99311410

Family Applications (1)

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TW113140192A TWI912977B (zh) 2024-10-22 2024-10-22 半導體結構及其製造方法

Country Status (3)

Country Link
US (1) US20260113924A1 (zh)
CN (1) CN121941045A (zh)
TW (1) TWI912977B (zh)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110223982B (zh) * 2018-03-01 2021-07-27 联华电子股份有限公司 动态随机存取存储器及其制作方法
KR102769861B1 (ko) * 2020-07-29 2025-02-17 삼성전자주식회사 반도체 메모리 소자 및 그 제조 방법
KR102908280B1 (ko) * 2021-06-17 2026-01-07 삼성전자주식회사 더미 게이트 구조체를 갖는 반도체 소자
KR20230080092A (ko) * 2021-11-29 2023-06-07 삼성전자주식회사 반도체 장치
KR20240030712A (ko) * 2022-08-31 2024-03-07 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
TWI839043B (zh) * 2022-12-26 2024-04-11 華邦電子股份有限公司 半導體結構及其製造方法
KR20240122024A (ko) * 2023-02-03 2024-08-12 삼성전자주식회사 반도체 소자
KR20240143535A (ko) * 2023-03-24 2024-10-02 삼성전자주식회사 집적회로 소자 및 이의 제조 방법

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